Scan Driving Device for Display with Reduced Dead Space
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Solution Overview
Problem
Conventional scan driving devices for display devices face challenges in minimizing dead space and producing accurate and stable scan signals, particularly as display panel sizes increase.
Innovation Solution
A scan driving device comprising multiple sequentially arranged scan drive blocks, each including specific transistors and capacitors, which are connected to input terminals for clock signals, power sources, and control signals to generate and output scan signals with precise voltage control, reducing the number of wires and minimizing dead space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the display panel size is increased, then the display area is improved, but the dead space increases
Solution Approach 1:
The scan driving device is divided into multiple scan drive blocks (first scan drive block, second scan drive block, etc.) that are sequentially arranged. Each block independently generates and transmits scan signals to specific scan lines, allowing for optimized space utilization and reduced dead space in the overall display structure.
Solution Approach 2:
The patent introduces a multi-dimensional scanning approach by implementing both forward scanning (through the first scan drive block) and backward scanning (through the second scan drive block). This bidirectional scanning capability optimizes space utilization by efficiently covering the display area in both directions, thereby reducing dead space.
2Device complexity
If conventional scan driving apparatus is used, then the structure is simple, but the scan signal waveform accuracy and stability deteriorate
Solution Approach 1:
Each scan drive block incorporates a bootstrap capacitor (first bootstrap capacitor, second bootstrap capacitor) that provides feedback mechanisms to maintain stable voltage levels. The capacitors store and regulate voltages (VGH, VGL) to ensure accurate and stable scan signal waveforms are generated and transmitted throughout the display structure.
Solution Approach 2:
The patent implements dynamic voltage control by changing voltage parameters through the bootstrap capacitors. The capacitors maintain specific voltage levels (VGH for gate on, VGL for gate off) that are critical for producing accurate scan signal waveforms. This parameter control ensures signal stability despite the increased complexity of the multi-block structure.
3Reliability
If more wires are used to control scan signals, then the signal transmission is improved, but the dead space increases
Solution Approach 1:
Adjacent scan drive blocks share common electrodes (first common electrode, second common electrode) that serve multiple functions. The first common electrode is shared between the first and second scan drive blocks, while the second common electrode is shared between the second scan drive block and subsequent blocks. This merging of components reduces the total number of wires needed while maintaining reliable signal transmission across all blocks.
Solution Approach 2:
The common electrodes serve universal functions across multiple scan drive blocks. Each common electrode is used by adjacent blocks for both signal transmission and voltage reference purposes, allowing the same physical structure to fulfill multiple roles. This multi-functionality reduces wire count and minimizes dead space while ensuring reliable scan signal transmission throughout the display.
Data Source
AI summary
A scan driving device for a display device includes a plurality of scan drive blocks that are sequentially arranged. Each scan drive block includes a first transistor including a gate electrode connected to a first node to which a gate on voltage is transmitted according to a first clock signal, a first electrode connected to a first power source voltage, and a second electrode connected to an output terminal; a second transistor including a gate electrode connected to a second node to which a signal that is input to an input terminal is transmitted according to the first clock signal, a first electrode connected to a second clock signal input terminal, and a second electrode connected to the output terminal; and a third transistor including a gate electrode connected to the first node, a first electrode connected to the input terminal, and a second electrode connected to the second node.