Scan Signal Driving Circuit with Multi-Gate Stabilization Transistor
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Solution Overview
Problem
In display devices with touch panels, particularly those using full in-cell type touch panels, the monolithic gate driver faces challenges in halting and restarting scanning without increasing frame size, due to significant off-leakage currents during idle periods, which affect the stability and accuracy of touch position detection.
Innovation Solution
The scan signal line driving circuit incorporates a shift register with unit circuits that include charge holding nodes, output control transistors, and charge holding node turn-off transistors, where the first stabilization transistor has a multi-gate structure and other transistors have a single gate structure, with specific gate lengths and configurations to manage leakage currents during idle periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the scanning is halted during an idle period for touch position detection, then touch position detection accuracy is improved, but charge leakage from charge holding nodes increases
Solution Approach 1:
The patent changes the gate length parameter of the first stabilization transistor to be larger than other transistors, which directly modifies the electrical characteristics (reducing off-leakage current) to maintain charge holding stability during idle periods when scanning is halted for touch detection
2Reliability
If a multi-gate structure is used for the first stabilization transistor, then off-leakage current is reduced, but device complexity increases
Solution Approach 1:
The patent applies the multi-gate structure only to the first stabilization transistor that is connected to the charge holding node, rather than all transistors. This localized application reduces off-leakage current where it matters most while minimizing the increase in overall device complexity
3Reliability
If the gate length of the first stabilization transistor is increased, then charge holding stability is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent specifies that the gate length of the first stabilization transistor should be larger than other transistors but within a controlled range (e.g., 1.5 to 3 times larger), which balances the need for charge holding stability with manufacturability by avoiding excessively large dimensions that would be difficult to control
Data Source
AI summary
Each unit circuit includes a thin film transistor (first stabilization transistor) having a gate terminal to which a clear signal which goes to an on level when a frame period ends applied, a drain terminal connected to a charge holding node, and a source terminal to which a potential of an off level is applied. Here, a gate length of the thin film transistor is set to be larger than gate lengths of other charge holding node turn-off transistors. Alternatively, a multi-gate structure is adopted for the thin film transistor and a single gate structure is adopted for the other charge holding node turn-off transistors.