Scan Driving Device Stabilizing Signals Against Clock Voltage Shaking

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Solution Overview

Problem

Existing scan driving devices face instability in outputting scan signals due to voltage changes caused by clock signals, leading to erroneous operations and signal shaking, which affects the reliability of display devices like OLEDs.

Innovation Solution

A scan driving device comprising sequentially arranged blocks with specific transistor and capacitor configurations, where clock signals are shifted by duty cycles to prevent signal shaking, and a method that involves turning on and off transistors to stabilize the output control signal and gate-on voltage, ensuring stable scan signal output.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If clock signals are applied to transfer voltages in scan driving blocks, then signal transmission and voltage transfer are enabled, but voltage changes cause scan signal shaking and operational errors

Engineering Contradiction:
Improvesignal transmission speedVSAvoidscan signal stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-charging capacitors connected to first nodes in each scan driving block before the clock signal transitions. This ensures that the nodes are ready to accept voltage transfers without being affected by transient voltage changes during the charging process, thereby preventing scan signal shaking while maintaining fast signal transmission.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If transistors are used to transfer voltages according to clock signals, then efficient voltage control is achieved, but voltage fluctuations cause erroneous operations

Engineering Contradiction:
Improvevoltage transfer efficiencyVSAvoidoperational accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements beforehand cushioning by introducing capacitors that are pre-charged to stable voltages before voltage transfer operations. These capacitors act as buffer elements that absorb voltage fluctuations and prevent them from propagating through the scan driving blocks, thereby maintaining operational accuracy while preserving efficient voltage transfer through the transistor network.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Area of stationary object

If sequential scan driving blocks are arranged to output scan signals, then comprehensive display coverage is achieved, but signal shaking propagates across blocks

Engineering Contradiction:
Improvedisplay coverage areaVSAvoidsignal stability across blocks
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies segmentation by dividing the scan driving circuit into multiple independent scan driving blocks, where each block contains its own dedicated capacitors connected to first nodes. This segmentation isolates voltage fluctuations within individual blocks, preventing signal shaking from propagating across the entire display array, while still achieving comprehensive coverage through the sequential arrangement of blocks.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9324269B2Scan driving device and method of driving the same
Publication Date: 2016.04.26 SAMSUNG DISPLAY CO LTD
  • US9324269B2 patent drawing
  • US9324269B2 patent drawing
  • US9324269B2 patent drawing

AI summary

A scan driving device includes scan driving blocks, each including: a first node receiving a signal that is input to a first driving signal input terminal according to a clock signal input to a first clock signal input terminal; a second node receiving a second power source voltage according to the clock signal input to the first clock signal input terminal and a signal input to a second driving signal input terminal; a first transistor including a gate electrode connected to the second node and an electrode receiving an output control signal; a second transistor including a gate electrode connected to the first node and an electrode connected to a second clock signal input terminal; and a third transistor including a gate electrode connected to the second node, an electrode connected to a first power source voltage, and another electrode connected to the first node.