Scan Gating Architecture for X-Tolerant Test Response Compaction

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Solution Overview

Problem

Existing test response compaction techniques are vulnerable to unknown (X) states, which can render test results useless by proliferating and masking observable scan cells, leading to fault coverage drop and design complexity.

Innovation Solution

A circuit with scan chains, test response compactor, and scan gating devices that selectively enable or disable groups of scan chains based on control signals, allowing masking of X states within redefinable groups and designated scan shift cycles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If test response compaction is performed using traditional compactors (MISR, combinational, or finite memory compactors), then compaction ratio is improved, but X states proliferate and render test results useless

Engineering Contradiction:
Improvecompaction ratioVSAvoidtest result validity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent divides scan chains into multiple groups and assigns different scan gating devices to each group. This segmentation allows selective masking of specific scan chain groups that contain X states, preventing X state proliferation while maintaining compaction of clean scan chains. The segmentation enables fine-grained control over which scan chains contribute to the compacted response.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces scan gating devices as intermediary components between scan chains and the test response compactor. These gating devices act as mediators that selectively block or pass scan chain outputs based on detected X states. This intermediary layer prevents direct propagation of X states to the compactor while maintaining the compactor's high compaction ratio functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If scan chain selection schemes are deployed to mask X states, then X state masking is improved, but on-chip logic complexity increases

Engineering Contradiction:
ImproveX state masking effectivenessVSAvoidon-chip logic complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments scan chains into groups and assigns one scan gating device per group, reducing the need for complex individual chain control logic. This segmentation simplifies the overall control architecture by managing X states at the group level rather than requiring complex per-chain analysis and control.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The scan gating devices are designed as universal components that can be applied to multiple scan chains within a group. Each gating device performs the same basic function of detecting and masking X states, allowing for standardized, reusable logic that reduces overall device complexity compared to custom solutions for each scan chain.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If modular time compactors (MISR) are used to prevent X state multiplication, then X state proliferation is reduced, but only partial reduction is achieved and test coverage drops

Engineering Contradiction:
ImproveX state toleranceVSAvoidtest coverage
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent segments scan chains into groups and applies scan gating devices at the group level, enabling more precise control over X state masking compared to MISR's circuit-level operation. This segmentation allows selective masking of only those scan chain groups containing X states, preserving test coverage from clean groups while achieving better X state tolerance overall.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The scan gating devices serve as intermediary components that prevent X states from reaching the MISR compactor in the first place, rather than attempting to correct or filter them after entry. This proactive blocking mechanism preserves test coverage by ensuring only valid scan chain responses are compacted, avoiding the coverage loss associated with MISR's partial X state handling.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4025922B1Universal compactor architecture for testing circuits
Publication Date: 2026.04.22 SIEMENS INDUSTRY SOFTWARE INC
  • EP4025922B1 patent drawingFigure 1
  • EP4025922B1 patent drawingFigure 2
  • EP4025922B1 patent drawingFigure 3

AI summary

A circuit comprises scan gating devices inserted between outputs of scan chains and inputs of a test response compactor. The scan gating devices divides the scan chains into groups of scan chains. Each of the scan gating devices operates in either an enabled mode or a disenabled mode based on a first signal. A scan gating device operating in the enabled mode blocks, blocks only at some clock cycles, or does not block a portion of a test response of a test pattern captured by and outputted from a scan chain in the associated scan chain group based on a second signal. Scan gating devices operating in the disenabled mode do not block, or based on a third signal, either block or do not block, a portion of the test response captured by and outputted from all scan chains in each of the associated scan chain groups.