Scan Lines Driver Transistor Voltage Drop Absorption
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Solution Overview
Problem
In OLED display devices, the large voltage drops across transistors during scan signal outputting periods can lead to excessive stress and undesirable characteristic changes, resulting in leakage currents and damage to the transistors.
Innovation Solution
Incorporating a second transistor in series with the first transistor to absorb part of the voltage drop, reducing the stress applied to the first transistor, and using a third transistor to maintain a turn-on state and limit the bias voltage through its on-resistance value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single transistor is used to transmit scan signals, then the device complexity is low, but large voltage drops cause excessive stress and transistor damage
Solution Approach 1:
The patent divides the single transistor function into multiple transistors (first transistor for signal transmission, second transistor for voltage drop absorption, third transistor for bias limitation). This segmentation allows each transistor to handle specific voltage ranges, preventing any single transistor from experiencing excessive stress while maintaining the overall scan signal transmission function.
2Reliability
If the third transistor has low on-resistance to limit bias voltage effectively, then transistor protection is improved, but energy loss increases
Solution Approach 1:
The patent optimizes the on-resistance parameter of the third transistor to achieve a balance between protection effectiveness and energy efficiency. By carefully selecting the resistance value, the system limits bias voltage to protect transistors while minimizing unnecessary energy dissipation, achieving optimal protection with reasonable energy loss.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration prevents the application of a higher bias voltage than the power source voltage to the transistor, thereby preventing undesirable characteristic changes and leakage currents, ensuring stable operation.
Implementation Method 1
a third transistor that is configured for dissipating part of a voltage drop between the third node and the first input terminal and thus limiting a bias voltage that is developed across the first transistor where the dissipation is a function of an on-resistance value of the third transistor
Data Source
AI summary
In a scan lines driver that is used for driving scan lines of an organic light emitting diodes (OLED) display, a large voltage drop can develop between the gate or source of one of its transistors and the corresponding drain during a scan signal outputting period. This large voltage drop can excessively stress the one transistor. However, in accordance with the present disclosure, a voltage drop dissipating, second transistor is provided in series with the first transistor for absorbing part of the large voltage drop and thus reducing the stress that is applied to the first transistor.