Scan Sequenced Power-On Initialization for SOC Reliability
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Solution Overview
Problem
Achieving a guaranteed power-on initialization state in complex SOC designs is challenging and inefficient, particularly for large designs, as explicit reset of each state element requires significant time and resources, leading to design process inefficiencies.
Innovation Solution
A scan sequenced initialization technique that supplies a predefined power-on state to a device or module without using explicit reset inputs, utilizing parallel scan chains and a power-on reset sequencer to indicate completion of state initialization to other circuits, leveraging existing hardware in SOC designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If explicit reset of each state element is performed to achieve guaranteed power-on initialization, then initialization reliability is improved, but initialization time and design process complexity increase significantly
Solution Approach 1:
The patent merges the initialization function with the existing scan chain infrastructure by making scan chains bidirectional. The same scan chains used for manufacturing test are repurposed to carry out power-on initialization, eliminating the need for separate reset logic for each state element. This consolidation achieves reliable initialization without the time penalty of individual element resetting.
Solution Approach 2:
The scan chains are designed to serve multiple functions: manufacturing test, power-on initialization, and potential future test scenarios. By making the scan chains universal and bidirectional, the patent eliminates the need for dedicated reset circuits and achieves initialization reliability through the existing test infrastructure.
2Reliability
If explicit reset of each state element is performed to ensure proper silicon functionality, then initialization reliability is improved, but device complexity and resource requirements increase
Solution Approach 1:
The patent combines the initialization function into the existing scan chain structure, making scan chains bidirectional. This eliminates the need for separate reset logic blocks and reduces overall device complexity while maintaining initialization reliability through the unified scan-based approach.
Solution Approach 2:
The scan chains are designed as universal components that handle both manufacturing test and power-on initialization. This multi-functionality removes the need for dedicated reset hardware, reducing device complexity and resource requirements while ensuring proper silicon functionality.
3Reliability
If traditional reset techniques are used for large SOC designs, then initialization completeness is improved, but manufacturing cost and time efficiency deteriorate
Solution Approach 1:
The patent merges power-on initialization with the existing scan chain infrastructure used for manufacturing test. This consolidation enables both functions to share the same hardware resources, significantly improving manufacturing efficiency and reducing costs while maintaining initialization completeness through the bidirectional scan chain approach.
Solution Approach 2:
The scan chains serve as universal components for both manufacturing test and power-on initialization in large SOC designs. This multi-functionality eliminates redundant hardware and optimizes resource utilization, thereby improving productivity and reducing manufacturing costs while ensuring complete initialization.
Data Source
AI summary
A scan sequenced initialization technique supplies a predefined power-on state to a device or module without using explicit reset input to the registers. This technique supplies a predefined pattern to parallel scan chains following power-on reset. The predefined pattern places the device or module in a architecturally specified reset state. The parallel scan chains are required for structural manufacturing test. Once the power-on reset scanning is complete, the power-on reset sequencer indicates completion of state initialization to other circuits.