Scan Test Signal Holding for Active Analog Circuit Operation
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Solution Overview
Problem
Existing semiconductor integrated circuits face challenges in performing scan tests on logic circuits while maintaining the operation of analog circuits, as conventional methods disrupt the active state of analog circuits during testing.
Innovation Solution
The integration of a holder circuit that maintains the output signal of the test target circuit during scan testing, allowing the analog circuit to remain active by holding and outputting the necessary signals, and a test controller that executes the scan test only when the analog circuits are in an active state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a scan test is performed on the test target circuit, then the logic circuit can be diagnosed, but the analog circuit cannot maintain its active state
Solution Approach 1:
The patent divides the output signal path into two separate paths: one path goes through the test target circuit for scan testing, and the other path uses a holder circuit to maintain the original output signal for the analog circuit. This segmentation allows independent operation of test and normal functions without interfering with each other.
Solution Approach 2:
The holder circuit acts as an intermediary that captures and maintains the output signal from the test target circuit before testing begins. This intermediary component ensures the analog circuit continues to receive valid signals during scan testing, resolving the conflict between testing and normal operation.
2Productivity
If the scan test is executed during active operation of analog circuits, then testing can be performed without interruption, but the analog circuits cannot maintain proper operation
Solution Approach 1:
The holder circuit performs preliminary action by capturing and storing the output signal from the test target circuit before the scan test begins. This pre-capture ensures that when the scan test executes, the analog circuit already has the necessary signal maintained, allowing continuous operation without interruption or degradation.
3Ease of manufacture
If conventional scan testing is performed, then the logic circuit can be tested, but the system requires shutdown or interruption of analog functions
Solution Approach 1:
The holder circuit provides multi-functionality by serving both as a signal maintenance mechanism during testing and as a normal signal path component during regular operation. This universal component allows the system to perform scan testing without requiring special shutdown procedures or complex state changes, maintaining simplicity while enabling testing capability.
Data Source
AI summary
A semiconductor integrated circuit includes a test target circuit which is subjected to a scan test and configured to generate an output signal for controlling an operation of an analog circuit in response to an input signal, a test controller for controlling the scan test in the test target circuit, and a holder for holding the output signal. When the analog circuit is in an active state, the test controller executes the scan test on the test target circuit in response to a signal requesting execution of the scan test being transmitted to the semiconductor integrated circuit. While the scan test is being executed, the holder holds the output signal available after the signal is transmitted to the semiconductor integrated circuit and before the scan test begins, and outputs the held output signal so as to keep the analog circuit in the active state.