Scan-Testing Idle Functional Units in Integrated Circuits

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Solution Overview

Problem

Modern digital systems often spend significant time with idle components, and existing self-testing methods are limited to boot time, failing to detect issues during normal operation, especially in devices like laptops and smartphones where long boot times are frustrating and battery conservation is crucial.

Innovation Solution

An integrated circuit system that includes a seed memory, vector generator, signature generator, state memorizer, and control unit to test functional units during idle times, generating and verifying test vectors and signatures while restoring the unit's state, allowing for continuous operation and fault detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If scan testing is performed during production test environment, then testing coverage is improved, but system productivity deteriorates due to inability to perform normal operations

Engineering Contradiction:
Improvetesting coverageVSAvoidsystem output
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically switches between normal operation mode and test mode based on idle detection. The functional unit transitions from processing input/output signals to undergoing scan testing when idle conditions are detected, allowing the system to adapt its state rather than being fixed in one mode

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system performs scan testing periodically during detected idle intervals rather than continuously. The test controller activates testing only when idle conditions are detected, creating periodic test cycles that coexist with normal operational cycles

Inventive Principle:
Principle #19Periodic action

2Reliability

If self-testing is performed at boot time, then system reliability is improved, but boot time increases which deteriorates user experience

Engineering Contradiction:
Improvesystem reliabilityVSAvoidboot time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary testing during detected idle intervals before critical operations are needed. By testing during idle times in normal operation, the system prepares for potential failures without delaying boot or critical functions

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system continues testing throughout operation rather than concentrating all testing at boot time. Multiple brief test intervals during idle periods provide continuous reliability monitoring without extending boot time

Inventive Principle:
Principle #20Continuity of useful action

3Use of energy by moving object

If functional units are kept idle to conserve battery power, then energy efficiency is improved, but opportunity for fault detection deteriorates

Engineering Contradiction:
Improvebattery power consumptionVSAvoidfault detection capability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The functional unit performs self-testing during its own idle intervals without requiring external test equipment. The test controller and scan chains within the unit enable autonomous fault detection during periods when the unit would otherwise be inactive

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system provides feedback about idle conditions to the test controller, which then activates testing. The signature comparator provides feedback about test results, enabling the system to detect faults during idle periods while maintaining energy efficiency

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9310436B2System and method for scan-testing of idle functional units in operating systems
Publication Date: 2016.04.12 OMNIVISION TECHNOLOGIES INC
  • US9310436B2 patent drawing
  • US9310436B2 patent drawing
  • US9310436B2 patent drawing

AI summary

A system has in an integrated circuit a seed memory coupled to seed a vector generator that provides a vector to at least one scan chain of a first functional unit. A signature generator is configured to generate a signature from scan chain data, the signature is compared to an expected signature in a signature memory. A state memorizer is provided for saving a state of the functional unit and to restore the state of the functional unit as testing is completed. The system also has apparatus configured to determine an idle condition of the functional unit despite a non-idle state of the system; and a control unit configured to operate a test sequence when the functional unit is idle, the test sequence saving a state of the unit, generating vectors and signatures and verifying the signatures, and restoring the state of the unit.