Scanner Alignment Sampling via Paired Edge Scan Regions
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Solution Overview
Problem
In semiconductor fabrication, misalignment of layers and masks leads to improper formation of devices, affecting their functionality, and existing alignment methods are inefficient, resulting in residual overlay errors and reduced semiconductor output.
Innovation Solution
The method involves defining scan region pairs along the periphery of a semiconductor wafer's sampling area, marked with alignment marks to determine layer alignment, reducing the sampling set and improving alignment accuracy, thereby enhancing overlay precision and increasing wafer production rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If alignment marks are placed across the entire sampling area, then alignment coverage is comprehensive, but the quantity of alignment marks increases and overlay residual errors worsen
Solution Approach 1:
The sampling area is divided into multiple scan regions arranged in scan region pairs along the periphery. Instead of uniformly distributing alignment marks across the entire area, the method segments the space into specific regions where alignment marks are strategically placed only within these scan regions, reducing the total quantity while maintaining measurement precision through targeted scanning.
Solution Approach 2:
Alignment marks are concentrated in specific periphery regions (scan regions) rather than being uniformly distributed. This local quality approach places alignment marks only where they are most needed for scanner alignment, optimizing the spatial distribution to reduce overall quantity while preserving alignment accuracy in critical areas.
2Measurement precision
If the entire sampling area is marked with alignment marks, then alignment evaluation is thorough, but manufacturing efficiency decreases
Solution Approach 1:
The method extracts only the essential scan regions from the entire sampling area for alignment mark placement. By taking out only the periphery regions where alignment evaluation is most critical and removing alignment marks from non-essential areas, the process maintains thorough alignment evaluation while reducing the total number of marks, thereby improving manufacturing efficiency.
Solution Approach 2:
Instead of applying alignment marks uniformly across the entire sampling area (excessive action), the method applies marks only to specific periphery scan regions (partial action). This partial approach is sufficient for achieving accurate scanner alignment while significantly reducing the time and complexity of the alignment process, thus improving wafer production rate.
3Loss of information
If alignment marks are distributed throughout the sampling area, then alignment data is comprehensive, but the complexity of alignment processing increases
Solution Approach 1:
The alignment processing complexity is reduced by segmenting the sampling area into discrete scan region pairs. Each pair can be processed independently, allowing the alignment system to handle data in manageable units rather than processing the entire sampling area as one large dataset, thus maintaining information completeness while reducing overall processing complexity.
Data Source
AI summary
Among other things, one or more systems and techniques for scanner alignment sampling are provided. A set of scan region pairs are defined along a periphery of a sampling area associated with a semiconductor wafer. Alignment marks are formed within scan regions of the set of scan region pairs, but are not formed within other regions of the sampling area. In this way, scan region pairs are scanned to determine alignment factors for respective scan region pairs. An alignment for the sampling area, such as layers or masks used to form patterns onto such layers, is determined based upon alignment factors determined for the scan region pairs.