Scanning Circuit Layout for Rounded Display Corners
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Solution Overview
Problem
In display panels with rounded corners, the scanning circuit layout is inefficient at corner portions, leading to increased load on scanning lines and potential image distortion due to delayed pulse rising and falling, as the scanning circuit needs to be arranged differently compared to straight sides, making it difficult to maintain layout efficiency and image quality.
Innovation Solution
A control circuit is arranged in a narrow area by placing shift register unit circuits adjacent to the display area in both directions, with enable circuits connected to control lines, ensuring even load distribution and minimizing delay differences across the display area, thus maintaining efficient pulse signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the scanning circuit is arranged at the corner portions in the same layout as the straight side portions, then the layout consistency is maintained, but the layout efficiency is deteriorated
Solution Approach 1:
The patent applies different layout strategies to different regions: straight side portions use one layout configuration while corner portions use a different layout configuration. This allows each region to be optimized for its specific geometric constraints, improving overall layout efficiency while maintaining consistency in functional performance.
Solution Approach 2:
The scanning circuit layout is segmented into different regions (straight sides and corners) with different arrangement strategies. This segmentation allows independent optimization of each region's layout to suit its specific spatial constraints, resolving the conflict between consistency and efficiency.
2Ease of manufacture
If the scanning circuit is arranged on the upper or lower side of the display area, then the layout difficulty is reduced, but the scanning line length increases causing load increase and pulse delay
Solution Approach 1:
The patent transitions from a one-dimensional linear arrangement of scanning circuits to a two-dimensional arrangement that utilizes both horizontal and vertical directions. By placing scanning circuits at corner portions and arranging them in multiple directions, the patent reduces scanning line lengths while maintaining layout feasibility.
Solution Approach 2:
The scanning circuits are positioned at corner portions before the scanning lines extend to pixel circuits, establishing optimal starting points that minimize line lengths. This preliminary placement strategy prevents excessive load and delay before signal transmission begins.
3Length of stationary object
If the scanning circuit is arranged in a narrow area, then the frame width is reduced, but the control circuit placement becomes more difficult
Solution Approach 1:
The patent utilizes two-dimensional space in the peripheral area to arrange control circuits, shifting from linear to planar arrangement. This allows efficient use of narrow frame spaces by distributing control circuits across available peripheral areas in multiple directions.
Solution Approach 2:
The control circuit is segmented into multiple unit circuits that can be independently arranged in the peripheral area. This segmentation allows flexible placement strategies that adapt to narrow frame constraints while maintaining functional integrity.
4Adaptability or versatility
If the connection lines between unit circuits and enable circuits are of different lengths, then the layout flexibility is improved, but the load difference and delay variation increases
Solution Approach 1:
The patent positions enable circuits at locations that create approximately equal distance relationships to all unit circuits. This equipotential arrangement ensures uniform signal transmission characteristics across all control lines, eliminating delay variations while maintaining layout flexibility.
Data Source
AI summary
A plurality of enable circuits are respectively adjacent to a display area in a first direction and connected to a plurality of control lines to output a control signal corresponding to a pulse signal. A plurality of unit circuits include a first group of unit circuits located adjacent to the display area in the first direction, and a second group of unit circuits located adjacent to the display area in a second direction. The plurality of connection lines include a first group of connection lines connected to the first group of unit circuits, and a second group of connection lines connected to the second group of unit circuits. The connection lines of the second group are longer than the connection lines of the first group.


