Scanning Circuit Threshold Stability Using Low-Amplitude Reset Signals
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Solution Overview
Problem
Conventional scanning circuits using single conductivity type thin-film transistors experience threshold voltage changes due to 'plus gate stress,' leading to circuit malfunctions and inability to maintain desired operation in display devices.
Innovation Solution
A scanning circuit design incorporating unit circuits with an output circuit, reset circuit, and reset signal generation circuit, where the reset signals have an amplitude smaller than the clock signals, and are used to control the output terminal to maintain a constant voltage, thereby reducing threshold voltage changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional dynamic unit circuits using single conductivity type transistors are used to form scanning circuits, then circuit complexity is reduced and ease of manufacture is improved, but threshold voltage changes occur due to plus gate stress leading to circuit malfunction
Solution Approach 1:
The unit circuit is divided into distinct functional blocks: output circuit (with transfer transistor), reset circuit (with reset transistors), and reset signal generation circuit (with clock transistors). This segmentation allows independent optimization of each block to prevent threshold voltage changes while maintaining manufacturing simplicity.
Solution Approach 2:
Reset signals are generated periodically with clock signals to periodically reset the output circuit and maintain the output terminal at constant voltage. This periodic action prevents continuous plus gate stress accumulation that would otherwise cause threshold voltage changes.
2Stability of the object's composition
If high level voltage is continuously applied to gate terminals of transistors to maintain output at low level, then output stability is improved, but threshold voltage changes increase due to continuous plus gate stress
Solution Approach 1:
The reset circuit proactively resets the output terminal to low level before plus gate stress can accumulate to problematic levels. By periodically applying reset signals, the circuit prevents the conditions that lead to threshold voltage changes while maintaining output stability.
Solution Approach 2:
The reset signal generation circuit monitors clock signals and generates reset signals based on their timing. This feedback mechanism ensures that reset operations occur at appropriate intervals to maintain output stability without causing excessive threshold voltage changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses threshold voltage changes in single conductivity type thin-film transistors, ensuring reliable operation of scanning circuits and improving the reliability of display devices by applying low-amplitude pulse signals to the transistors.
Implementation Method 1
the potential of the floating P1 also increases due to a boot strap effect via a not-shown parasitic capacitor between nodes P1 to 13 (OUTPUT 1) of the transistor 16
Data Source
AI summary
A display device including a scanning circuit formed using single conductivity type thin-film transistors suppresses threshold changes in the thin-film transistors forming the scanning circuit by controlling a circuit for maintaining an internal node of the unit circuits forming the scanning circuit at a constant potential is controlled by a clock signal or a pulse signal having a smaller amplitude than the amplitude of an output signal.