In-Memory Scatter Gather Processing via Distributed Sensing Circuitries
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Solution Overview
Problem
Existing memory systems face inefficiencies in scatter/gather operations due to low ordering and locality of successive memory accesses, leading to increased power consumption and reduced performance as data is frequently fetched into cache, used once, and then flushed out.
Innovation Solution
Implementing a memory device with processing-in-memory (PIM) capabilities that distributes the implementation of scatter/gather operations over multiple sensing circuitries, allowing for local execution of logical operations within the memory array, thereby reducing data movement and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If data is fetched into cache for scatter/gather operations, then accessibility of data is improved, but power consumption increases and performance decreases due to frequent cache fetches and flushes
Solution Approach 1:
The patent combines memory storage and processing functions into a unified memory device with integrated sensing circuitries. The scatter/gather operations are performed directly within the memory device by distributing operations across multiple sensing circuitries, eliminating the need for separate cache memory and reducing data movement between components. This merging of storage and processing resolves the contradiction by enabling data accessibility while avoiding the power consumption penalties of traditional cache-based approaches.
Solution Approach 2:
The memory device performs scatter/gather operations autonomously using its own integrated sensing circuitries without requiring external processing units or cache memory. Each sensing circuitry executes logical operations locally on data within the memory array, allowing the memory device to serve its own processing needs. This self-service capability eliminates unnecessary data movement and associated power consumption while maintaining full data accessibility.
2Ease of operation
If data is frequently fetched into cache and flushed out, then data accessibility is maintained, but performance decreases due to repeated data movement
Solution Approach 1:
By merging memory storage and processing capabilities into a single integrated device, the patent eliminates the performance penalty associated with frequent data movement between cache and main memory. The scatter/gather operations execute in-place within the memory array using distributed sensing circuitries, maintaining data accessibility while dramatically improving performance by removing the fetch-flush cycle entirely.
Solution Approach 2:
The patent segments the scatter/gather operations across multiple sensing circuitries that operate in parallel on different portions of the memory array. This segmentation allows simultaneous execution of multiple logical operations on different data segments, improving overall performance while maintaining data accessibility through the distributed architecture.
3Adaptability or versatility
If scatter/gather operations are executed externally to memory array, then operational flexibility is maintained, but power consumption increases due to data transfer
Solution Approach 1:
The patent merges processing capabilities directly into the memory device by integrating multiple sensing circuitries that can execute scatter/gather operations in-place. This eliminates the need to transfer data between memory and external processing units, maintaining operational flexibility through programmable sensing circuitries while dramatically reducing power consumption by eliminating data movement.
Solution Approach 2:
The patent transitions from traditional external processing to in-memory processing by utilizing the vertical integration of sensing circuitries within the memory device structure. This dimensional shift allows processing operations to occur at the same physical location as data storage, eliminating the spatial data movement that causes power consumption while preserving operational flexibility through configurable sensing circuitry.
Data Source
AI summary
The present disclosure includes apparatuses and methods related to scatter/gather in a memory device. An example apparatus comprises a memory device that includes an array of memory cells, sensing circuitry, and a memory controller coupled to one another. The sensing circuitry includes a sense amplifier and a compute component configured to implement logical operations. A channel controller is configured to receive a block of instructions, the block of instructions including individual instructions for at least one of a gather operation and a scatter operation. The channel controller is configured to send individual instructions to the memory device and to control the memory controller such that the at least one of the gather operation and the scatter operation is executed on the memory device based on a corresponding one of the individual instructions.