Direct Scatter Loading of Executable Software Images

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Solution Overview

Problem

In multi-processor systems, the need to load boot code from one processor to another requires additional non-volatile memory, increasing circuit board size and cost, and existing methods involve inefficient intermediate buffering and packet-based communication.

Innovation Solution

A direct scatter load technique is employed, where the primary processor sends raw executable software images directly to the secondary processor's volatile memory, bypassing temporary buffers and packet headers, using an inter-chip communication bus and a scatter loader controller to determine target locations within the secondary processor's system memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated non-volatile memory is added to each processor, then each processor can store its own boot code independently, but the circuit board size increases

Engineering Contradiction:
Improveboot code storage independenceVSAvoidcircuit board size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The primary processor's non-volatile memory serves multiple functions: storing the primary processor's own boot code and also storing boot code for secondary processors. This shared storage approach eliminates the need for separate non-volatile memory on each processor, reducing circuit board size while maintaining boot code storage independence.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces an intermediate loading mechanism where the primary processor loads boot code from its non-volatile memory into its system memory, then transfers it to secondary processors. This intermediary approach allows secondary processors to boot without having their own non-volatile memory, resolving the contradiction between boot independence and board size.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If software image is loaded through intermediate buffer with packet-based communication, then data can be transferred between processors, but the boot speed decreases due to multiple copy operations

Engineering Contradiction:
Improveinter-processor data transferVSAvoidboot speed
Core Design Contradiction:
Ease of operationVSSpeed

Solution Approach 1:

The patent extracts and eliminates the intermediate buffering step from the traditional data transfer process. By using a direct scatter load mechanism, the system transfers boot code directly from the primary processor's system memory to the secondary processor's system memory without copying through an intermediate buffer, thereby removing the speed bottleneck while maintaining inter-processor transfer capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The primary processor prepares the boot code in its system memory before transfer, organizing it in a format ready for direct scattering to the secondary processor. This preliminary preparation eliminates the need for post-reception processing and intermediate buffering, enabling faster boot speeds while maintaining ease of operation.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If temporary buffer is allocated in system memory for receiving packets, then packet-based communication can be implemented, but memory usage increases and copy operations are required

Engineering Contradiction:
Improvepacket-based communicationVSAvoidmemory usage
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The patent removes the temporary buffer allocation from the communication process by implementing a scatter load mechanism that writes data directly to the final destination in system memory. This eliminates the need for intermediate buffering, reducing memory usage while maintaining the ability to communicate between processors through the primary processor's system memory.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentEP2550603B1Direct scatter loading of executable software image from a primary processor to one or more secondary processors in a multi-processor system
Publication Date: 2021.03.10 QUALCOMM INC
  • EP2550603B1 patent drawingFigure 1
  • EP2550603B1 patent drawingFigure 2
  • EP2550603B1 patent drawingFigure 3

AI summary

In a multi-processor system, an executable software image including an image header and a segmented data image is scatter loaded from a first processor to a second processor. The image header contains the target locations for the data image segments to be scatter loaded into memory of the second processor. Once the image header has been processed, the data segments may be directly loaded into the memory of the second processor without further CPU involvement from the second processor.