Simplified Scatterometry Structure for Si Recess Etch Profile Control
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Solution Overview
Problem
Current metrology methods, such as SEM, TEM, and profilometry, are inadequate for accurately measuring complex three-dimensional structures in integrated circuits, particularly for MOS transistor structures with undercut features, due to limited resolution, high costs, and slow processing times, while scatterometry struggles with structures having multiple elements.
Innovation Solution
A simplified scatterometry structure is developed, replicating key features of the target structure with fewer elements to enable accurate profile measurements using known scatterometric techniques, allowing for quick, cost-effective, and non-destructive profiling of etched regions adjacent to MOS transistor gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional metrology methods (SEM, TEM, profilometry) are used to measure complex three-dimensional structures, then measurement detail and resolution are improved, but processing time increases and sample size is limited
Solution Approach 1:
The patent creates simplified replica structures that copy only the essential geometric features needed for etch profile measurement, eliminating unnecessary complexity. These replicas can be measured rapidly using scatterometry while preserving the critical dimensional information needed for process control.
Solution Approach 2:
The patent segments the measurement task by separating the complex transistor structure into simplified representative features. Instead of measuring the entire complex structure, only the critical etched region geometry is replicated and measured, enabling faster processing.
2Measurement precision
If TEM is used for detailed structure measurement, then measurement precision is improved, but cost increases and sample size is limited
Solution Approach 1:
The patent creates simplified replica structures that can be measured using scatterometry, which is significantly less expensive than TEM. The replicas preserve the essential etch profile geometry while eliminating the need for costly and complex TEM instrumentation.
Solution Approach 2:
The patent uses simple, easily fabricated replica structures that can be rapidly produced and measured. These simplified structures serve as disposable measurement targets that enable cost-effective process monitoring without requiring expensive TEM facilities.
3Productivity
If scatterometry is used to measure structures with multiple elements, then productivity is improved, but measurement precision deteriorates due to modeling difficulty
Solution Approach 1:
The patent extracts only the essential geometric features needed for etch profile measurement from the complex multi-element transistor structure. By removing unnecessary elements and simplifying the replica structure, scatterometry modeling becomes tractable while preserving the critical dimensional information.
Solution Approach 2:
The patent applies local quality by focusing measurement efforts on the specific etched region geometry that is critical for process control. The replica structures are designed with localized features that represent the critical dimensions, allowing scatterometry to achieve sufficient precision for process monitoring without requiring complete structural fidelity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables precise and efficient profile measurements of complex structures, improving fabrication control and reducing manufacturing costs by providing accurate data for adjusting etch process parameters, thus maintaining electrical parameters within specified limits.
Implementation Method 1
scatterometry has difficulty modeling structures with multiple elements such as the multiple gate spacer elements in advanced MOS transistors
Data Source
AI summary
Dimensions of structures in integrated circuits are shrinking with each new fabrication technology generation. Maintaining control of profiles of structures in transistors and interconnects is becoming more important to sustaining profitable integrated circuit production facilities. Measuring profiles of structures with many elements in integrated circuits, such as MOS transistor gates with recessed regions for Si—Ge epitaxial layers, is not cost effective for the commonly used metrology techniques: SEM, TEM and AFM. Scatterometry is technically unfeasible due to the number of elements and optical constants. The instant invention is a simplified scatterometry structure which reproduces the profiles of a structure to be profiled in a simpler structure that is compatible with conventional scatterometric techniques. A method of fabricating a transistor and an integrated circuit using the inventive simplified scatterometry structure are also disclosed.