Application-Specific Scheduler Optimizing Cache Reuse

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Solution Overview

Problem

Existing cache management methods in computer systems often prioritize either data or instruction reuse, leading to increased complexity and overhead, and require specialized hardware, failing to effectively minimize cache misses across both data and instruction reuse.

Innovation Solution

A scheduler with internal knowledge of the application is deployed to minimize cache misses by prioritizing thread execution based on collective execution history and task characteristics, weighing instruction and data reuse importance to optimize cache content reuse without imposing heavy processing overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If generalised cache reuse methods are employed to facilitate both data and instruction reuse, then cache hit rates improve, but system complexity and processing overhead increase

Engineering Contradiction:
Improvecache hit rateVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The scheduler is enhanced with application-specific knowledge enabling it to autonomously make scheduling decisions that optimize cache reuse. The system serves itself by using execution history and task characteristics to determine optimal thread-to-processor mappings without requiring external cache management hardware or complex monitoring systems.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system pre-processes task information to determine task characteristics and maintains execution history before scheduling decisions are made. By analyzing task types and historical execution patterns in advance, the scheduler can predict which threads are likely to benefit from cache reuse and make informed scheduling decisions without real-time complexity.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If specialised hardware is deployed to track cache content for reuse optimization, then cache reuse accuracy improves, but device complexity and cost increase

Engineering Contradiction:
Improvecache content tracking accuracyVSAvoidhardware complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces hardware-based cache tracking mechanisms with a software-based scheduler that has application-specific knowledge. Instead of using specialized hardware to monitor and track cache content, the system uses software analysis of execution history and task characteristics to make equivalent or superior scheduling decisions.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The scheduler acts as an intermediary between the application and the hardware, using application-specific knowledge to translate high-level task characteristics into optimal scheduling decisions. This intermediary layer eliminates the need for hardware to directly track and manage cache content.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If detailed cache monitoring is implemented to gather accurate cache content information, then cache reuse efficiency improves, but processing overhead increases

Engineering Contradiction:
Improvecache reuse efficiencyVSAvoidprocessing overhead
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system performs partial monitoring by focusing only on the specific task characteristics and execution history relevant to cache reuse, rather than comprehensively tracking all cache activities. This selective approach gathers sufficient information for effective scheduling without the overhead of complete cache monitoring.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9015722B2Efficient cache reuse through application determined scheduling
Publication Date: 2015.04.21 CANON KK
  • US9015722B2 patent drawing
  • US9015722B2 patent drawing
  • US9015722B2 patent drawing

AI summary

A method of determining a thread from a plurality of threads to execute a task in a multi-processor computer system. The plurality of threads is grouped into at least one subset associated with a cache memory of the computer system. The task has a type determined by a set of instructions. The method obtains an execution history of the subset of plurality of threads and determines a weighting for each of the set of instructions and the set of data, the weightings depending on the type of the task. A suitability of the subset of the threads to execute the task based on the execution history and the determined weightings, is then determined. Subject to the determined suitability of the subset of threads, the method determining a thread from the subset of threads to execute the task using content of the cache memory associated with the subset of threads.