Hierarchical Scheduler Zone Bit Sort Mechanism
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Solution Overview
Problem
In multithreaded multiprocessor systems, the existing scheduling methods for network processors face inefficiencies due to the need to check for departure time wrap-around and prioritize packets, which increases compute cycles and reduces available bandwidth, especially in hierarchical scheduling where multiple selections are required for each packet.
Innovation Solution
The introduction of a zone bit for departure times allows for efficient sorting by dividing the time range into two zones, reducing the need to check each individual departure time and minimizing reordering when wrap-around occurs, thereby decreasing the time required to select the best packet for forwarding in the hierarchy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If explicit checks are performed for each departure time to detect wrap-around, then scheduling accuracy is improved, but computational overhead increases and available bandwidth decreases
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing wrap-around information in the departure time data structure itself, rather than checking during the scheduling process. The departure time field includes encoded wrap-around status that is prepared in advance, eliminating the need for runtime check-and-branch instructions and reducing computational overhead while maintaining scheduling accuracy.
2Adaptability or versatility
If multiple selection processes are performed at each level of hierarchical scheduling, then scheduling flexibility is improved, but processing time increases
Solution Approach 1:
The patent applies segmentation by dividing the scheduling process into distinct hierarchical levels, each with its own selection criteria and data structures. This allows independent optimization at each level and enables parallel processing of selections across different levels, reducing overall processing time while maintaining scheduling flexibility through multi-level decision-making.
Solution Approach 2:
The patent performs preliminary sorting and organization of packets at each hierarchical level before the selection process. By pre-organizing data structures and pre-calculating selection candidates at lower levels, the actual selection process at higher levels becomes faster, reducing total processing time while preserving scheduling flexibility.
3Device complexity
If departure time bits are limited to reduce storage requirements, then device complexity is reduced, but wrap-around detection becomes more difficult
Solution Approach 1:
The patent introduces an intermediary mechanism where the departure time data structure includes additional fields that mediate between the limited bit representation and the need for accurate wrap-around detection. These intermediary fields store wrap-around status and related information, allowing accurate detection without increasing the core departure time bit allocation, thus balancing storage constraints with detection accuracy.
Data Source
AI summary
Scheduling of packets is performed by a scheduler based on departure times. If wrap up of departure times is possible, departure times are transposed based on a zone associated with the last departure time. By using the zone to transpose in order to sort departure times, cycles of independent checks on each of the departure times are avoided.