Schematic Driven Layout Creation for Analog Circuits

Solution Overview

Problem

The existing netlist design flow is inefficient for generating layouts of analog and high-performance digital circuits, as it fails to recognize similar circuit structures, leading to increased time and effort in layout design.

Innovation Solution

A schematic-driven layout method that identifies and copies layout patterns from pattern sub-circuits with similar topologies, allowing for the reuse of previously designed sub-circuits and layouts, thereby reducing the time and effort required for layout design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If netlist design flow is used to generate layout, then standard cells can be automatically recognized and copied, but circuits with similar structures cannot be identified and layout design time cannot be significantly reduced

Engineering Contradiction:

Improvelayout design efficiencyVSAvoidrecognition of similar circuit structures

Core Design Contradiction:

ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent applies copying by identifying sub-circuits with similar topologies to existing pattern sub-circuits and copying their layout patterns. When a sub-circuit's topology matches a stored pattern, the layout is automatically copied and associated with the new sub-circuit, eliminating manual layout design for repetitive structures.

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The patent segments the circuit into sub-circuits and analyzes their topologies independently. By breaking down the overall circuit into manageable sub-circuit units with distinct topologies, the system can efficiently compare and match them against stored patterns, enabling scalable layout generation for large circuits.

Inventive Principle:

Principle #1Segmentation

2Ease of operation

If schematic design flow is used, then circuit topology and structure can be intuitively understood, but layout drawing time increases for circuits with thousands to millions of basic cells

Engineering Contradiction:

Improveintuitiveness of circuit designVSAvoidlayout drawing time

Core Design Contradiction:

Ease of operationVSLoss of time

Solution Approach 1:

The patent performs preliminary action by pre-storing layout patterns of common sub-circuit topologies in a database before actual layout design. When designing new circuits, these pre-stored patterns are quickly matched against sub-circuit topologies, allowing automatic layout generation without manual drawing, thus preserving the intuitiveness of schematic design while dramatically reducing layout time.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent applies copying by identifying sub-circuits with similar topologies to existing pattern sub-circuits and copying their layout patterns. When a sub-circuit's topology matches a stored pattern, the layout is automatically copied and associated with the new sub-circuit, eliminating manual layout design for repetitive structures.

Inventive Principle:

Principle #26Copying

3Extent of automation

If netlist design flow is used, then layout generation can be automated, but it fails to recognize similar circuit structures in analog and high-performance digital circuits

Engineering Contradiction:

Improvelayout generation automationVSAvoidtopology recognition accuracy

Core Design Contradiction:

Extent of automationVSMeasurement precision

Solution Approach 1:

The patent applies copying by identifying sub-circuits with similar topologies to existing pattern sub-circuits and copying their layout patterns. When a sub-circuit's topology matches a stored pattern, the layout is automatically copied and associated with the new sub-circuit, eliminating manual layout design for repetitive structures.

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The patent applies parameter changes by transforming the circuit representation from netlist format to topology-based format for pattern matching purposes. This parameter transformation enables the system to recognize structural similarities that would be invisible in traditional netlist comparisons, improving both automation and recognition accuracy.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS8893069B2Method of schematic driven layout creation

Publication Date: 2014.11.18 SYNOPSYS INC

AI summary

A computer-implemented method is disclosed for layout pattern or layout constraint reuse by identifying sub-circuits with identical or similar schematic structure based on a topology comparison strategy. The selected sub-circuit is transformed into a topology representing the relative positions among the instances of the selected sub-circuit. Based on the topology, one or more sub-circuits with identical or similar topologies in a predefined scope of a schematic are recognized and identified. Accordingly, the layout or the layout constraint of the selected sub-circuit is copied and associated to each of the identified sub-circuits. Furthermore, once the sub-circuits are identified, they can be listed on a user interface with notations to allow users to confirm each of the identified sub-circuits respectively.