High-Voltage Input Schmitt Buffer With Tracking Trip Control

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Solution Overview

Problem

Integrated circuits face challenges in maintaining reliable input high voltage/input low voltage (VIH/VIL) spread and addressing reliability issues such as hot carrier injection (HCI) and bias temperature instability (BTI) when operating at high voltages using low voltage devices, particularly in CMOS technology, where conventional Schmitt circuits exhibit nonlinear behavior and reduced gain around trip points.

Innovation Solution

The implementation of a tracking circuit and a cascaded Schmitt topology with low voltage switching devices, including PMOS and NMOS transistors, that generates a tracking signal to follow input signals across different voltage levels, reducing VIH/VIL spread and enhancing gain, thereby improving reliability and compliance with JEDEC standards for various I/O interfaces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If conventional Schmitt circuits are used at high voltage, then the circuit can operate at high voltage levels, but the gain is reduced around trip points and VIH/VIL spread increases

Engineering Contradiction:
Improvevoltage operating levelVSAvoidgain stability and VIH/VIL spread
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

A tracking circuit is introduced as an intermediary component that generates a tracking signal following the input signal voltage levels. This tracking signal is used to dynamically adjust the trip points of the Schmitt buffer, thereby maintaining stable gain and VIH/VIL characteristics even when operating at high voltage levels that exceed the rated voltage of the low-voltage CMOS devices.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The circuit dynamically changes the trip point parameters of the Schmitt buffer based on the input signal voltage level. By using the tracking signal to modulate the trip points, the circuit adapts its operating characteristics to match the high voltage operating conditions, preventing gain reduction and VIH/VIL spread increase that would occur with fixed trip points.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If low voltage CMOS devices are used for high voltage operation, then device integration is achieved, but reliability issues such as hot carrier injection and bias temperature instability increase

Engineering Contradiction:
Improvedevice integrationVSAvoidhot carrier injection and bias temperature instability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The tracking circuit provides beforehand cushioning by preemptively adjusting the trip points in response to input voltage changes. This prevents the low-voltage CMOS devices from being exposed to harmful high voltage stress conditions, thereby reducing hot carrier injection and bias temperature instability effects before they can degrade device reliability.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If the tracking signal follows the input signal across all voltage levels, then VIH/VIL spread is reduced, but the risk of exceeding device maximum tolerable voltage increases

Engineering Contradiction:
ImproveVIH/VIL spreadVSAvoidvoltage breakdown
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The tracking signal follows the input signal only within safe voltage ranges, applying local quality adjustment rather than universal tracking. The circuit selectively tracks and adjusts trip points for voltage portions that are safe for the low-voltage devices, while preventing adjustment that would expose the devices to harmful high voltage levels, thus maintaining VIH/VIL spread reduction without causing voltage breakdown.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11621704B2Input Schmitt buffer operating at a high voltage using low voltage devices
Publication Date: 2023.04.04 SYNOPSYS INC
  • US11621704B2 patent drawing
  • US11621704B2 patent drawing
  • US11621704B2 patent drawing

AI summary

An input buffer circuit includes a tracking circuit that produces a tracking signal and an inverter including a cascade of low voltage switching devices coupled to an output of the tracking circuit. The tracking signal follows a first signal during a first time period and a second signal during a second time period. The tracking circuit is configured to reduce an input high voltage/input low voltage (VIH/VIL) spread.