Schmitt Trigger ESD Protection in Low-Voltage Integrated Circuits
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Solution Overview
Problem
As semiconductor integrated circuits (ICs) become smaller and more complex, they are susceptible to electrostatic discharge (ESD), which can cause harmful effects to solid-state electronic components. Additionally, reduced operating voltages in ICs affect their performance and make them more vulnerable to ESD.
Innovation Solution
Incorporating a Schmitt trigger circuit coupled in parallel with an ESD circuit within the IC. The Schmitt trigger circuit includes sets of transistors and feedback transistors, along with additional circuits that supply different voltage supplies to specific nodes, preventing parasitic transistors from turning on during an ESD event.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If IC size is reduced and complexity is increased, then device functionality and integration are improved, but susceptibility to electrostatic discharge (ESD) increases
Solution Approach 1:
The patent introduces a parasitic transistor as an intermediary protective element between the ESD event source and the sensitive IC components. When ESD occurs, the parasitic transistor activates and provides a controlled discharge path, mediating the harmful energy before it reaches the main circuitry. This allows the IC to maintain high functionality while gaining ESD protection through the intermediary structure.
2Use of energy by moving object
If operating voltage is reduced, then power consumption is decreased, but ESD resistance is reduced
Solution Approach 1:
The patent implements preliminary anti-action by pre-configuring the parasitic transistor structure to counteract ESD effects before they occur. The parasitic transistor is designed with specific threshold characteristics that allow it to remain inactive during normal low-voltage operation but automatically activate when ESD voltage exceeds the threshold, providing pre-planned protection without affecting normal power consumption.
3Object-affected harmful factors
If parasitic transistors are allowed to turn on during ESD, then ESD current can be discharged, but normal circuit operation is disrupted
Solution Approach 1:
The patent utilizes parameter changes in the parasitic transistor's operating characteristics. By designing the parasitic transistor with a high threshold voltage and specific biasing conditions, it remains in the off-state during normal operation (maintaining circuit reliability) but transitions to the on-state when ESD voltage exceeds the threshold (enabling ESD discharge). The parameter changes are triggered by the extreme voltage conditions of ESD events.
Solution Approach 2:
The parasitic transistor exhibits dynamic behavior, transitioning between off and on states based on the applied voltage conditions. During normal operation, it remains off and does not interfere with circuit functionality. During ESD events, it dynamically activates to provide discharge path, then returns to off-state after the ESD pulse subsides. This dynamic characteristic allows it to serve dual purposes without compromising reliability.
Data Source
AI summary
An integrated circuit includes a Schmitt trigger circuit. The Schmitt trigger circuit includes a first, second, third and fourth transistor, a first and second feedback transistor, and a first and second circuit. The first transistor is connected between a first node and a first voltage supply having a first supply voltage. The fourth transistor is connected between the third transistor and a second voltage supply having a second supply voltage. The first circuit is connected to a second node, the first and second voltage supply, and configured to supply the second supply voltage to the second node in response to being enabled. The second feedback transistor is connected to a third node, and a fourth node. The second circuit is connected to the fourth node, the first and second voltage supply, and configured to supply the first supply voltage to the fourth node in response to being enabled.