On-Chip Power-Combining Schottky Diode Frequency Multipliers
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Solution Overview
Problem
Traditional power-combining topologies for high-frequency Schottky diode multipliers face challenges beyond 1 THz due to increased waveguide losses and impractical alignment requirements, limiting power-handling capabilities and output power at terahertz frequencies.
Innovation Solution
A monolithic microwave integrated circuit (MMIC) device with multiple identical multiplying structures integrated on a single chip, utilizing stripline connections and symmetric antenna placement to divide and recombine power in-phase, reducing waveguide losses and alignment complexities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If traditional power-combining topologies are used beyond 1 THz, then power-handling capabilities can be increased, but waveguide losses increase considerably
Solution Approach 1:
The patent transitions from traditional waveguide-based power combining to on-chip planar transmission line integration, effectively moving the power combining function to a different dimensional approach (integrated circuit plane vs. waveguide volume). This reduces the electrical path length and eliminates the need for complex waveguide junctions at terahertz frequencies, thereby reducing waveguide losses while maintaining power-handling capabilities.
Solution Approach 2:
The patent merges multiple multiplying structures and power combining functions into a single integrated chip. By integrating multiple Schottky diode multiplier circuits and their power combining networks on one chip, the invention eliminates the need for separate waveguide components and junctions, reducing the overall electrical path and associated losses at terahertz frequencies.
2Power
If traditional power-combining topologies are used, then power levels can be increased, but alignment precision requirements become impractically high
Solution Approach 1:
The patent combines multiple multiplier circuits and power combining networks into a single monolithic integrated circuit. This integration eliminates the need for separate component assembly and alignment, as all elements are fabricated together on the same chip using standard semiconductor manufacturing processes, thereby reducing alignment precision requirements to practical levels.
Solution Approach 2:
The patent replaces the mechanical assembly and alignment of separate waveguide components with a semiconductor fabrication process. The positions of all circuit elements are defined by lithographic patterns rather than mechanical positioning, eliminating the need for precise manual or automated alignment during assembly.
3Power
If the number of diodes in a single chip is increased to handle higher power, then power-handling capabilities improve, but the chip size and complexity increase
Solution Approach 1:
The patent divides the high-power multiplier into multiple identical or semi-identical modular circuits, each handling a portion of the total power. These modules are then power-combined on the same chip. This segmentation allows the use of simpler, optimized unit circuits while achieving high overall power handling through parallel operation and combining.
Solution Approach 2:
The patent changes the operating parameters of multiple diodes to optimize power handling. By adjusting bias conditions, geometric parameters, and frequency of operation across multiple diodes, the system achieves high power output without requiring each individual diode to be excessively large or complex.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The MMIC device enhances power-handling capabilities and output power by a factor proportional to the number of multiplying structures, achieving efficient power combining and reduced waveguide losses, while maintaining circuit symmetry and alignment accuracy through Silicon micromachining.
Implementation Method 1
two or more Schottky diodes that are used as nonlinear semiconductor devices to generate harmonics out of the input signal and produce the multiplied output signal
Implementation Method 2
each of the integrated multiplying structures include one input antenna (E-probe) for receiving an input signal inputted on the chip
Data Source
AI summary
A novel MMIC on-chip power-combined frequency multiplier device and a method of fabricating the same, comprising two or more multiplying structures integrated on a single chip, wherein each of the integrated multiplying structures are electrically identical and each of the multiplying structures include one input antenna (E-probe) for receiving an input signal in the millimeter-wave, submillimeter-wave or terahertz frequency range inputted on the chip, a stripline based input matching network electrically connecting the input antennas to two or more Schottky diodes in a balanced configuration, two or more Schottky diodes that are used as nonlinear semiconductor devices to generate harmonics out of the input signal and produce the multiplied output signal, stripline based output matching networks for transmitting the output signal from the Schottky diodes to an output antenna, and an output antenna (E-probe) for transmitting the output signal off the chip into the output waveguide transmission line.


