Integrated Schottky Diode Layout for Lower Thermal Coupling
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Solution Overview
Problem
The operation of power devices generates significant heat, which increases the temperature of Schottky Barrier Diodes (SBDs) and degrades their performance, leading to increased specific series resistance and junction capacitance, making them less efficient in high-temperature applications.
Innovation Solution
A semiconductor device design featuring compact active regions, or 'tubs', where power devices and SBDs are separated to reduce the impact of heat on the SBDs, with power device cells in higher-temperature tubs and SBD cells in lower-temperature tubs, allowing for improved thermal management and reduced operating temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the SBD is integrated on the same die as the power device, then parasitic inductances are reduced, but the operating temperature of the SBD increases due to heat generated by the power device
Solution Approach 1:
The semiconductor die is divided into two distinct regions: a first region for the power device and a second region for the SBD. This spatial segmentation allows each component to operate in its optimal thermal environment, with the SBD positioned away from the heat-generating power device while maintaining integration benefits.
Solution Approach 2:
Different regions of the semiconductor die are assigned different thermal characteristics. The second region containing the SBD is designed to have lower operating temperature compared to the first region containing the power device, creating localized thermal zones optimized for each component's performance requirements.
2Reliability
If the operating temperature of the SBD increases, then the specific series resistance increases, but increasing the active area footprint to compensate results in higher junction capacitance
Solution Approach 1:
The SBD is positioned in the second region before operation to prevent temperature-induced resistance increases. This proactive thermal management approach avoids the need for compensatory area increases that would otherwise be required to maintain acceptable resistance levels under elevated temperature conditions.
Solution Approach 2:
The operating temperature parameter of the SBD is controlled and maintained at lower levels through strategic placement in the second region. This parameter control prevents the chain reaction of increased resistance requiring larger area, thereby maintaining optimal electrical characteristics without footprint penalties.
Data Source
AI summary
A semiconductor device comprises a semiconductor die having a first region and a second region, wherein an operating temperature of the second region is lower than an operating temperature of the first region. A plurality of first tubs are respectively disposed in the first region, the second region, or both. The semiconductor device further comprises a power device comprising a plurality of power device cells, and a diode having a plurality of diode cells. The power devices cells are disposed within tubs or portions of tubs that are in the first region, and the diode cells are disposed within tubs or portions of tubs that are in the second region. The power device may comprise a vertical metal oxide semiconductor field effect transistor (MOSFET), and the diode may comprise a vertical Schottky barrier diode (SBD).