Schottky Diodes on Semipolar III-N Sidewalls for RF Integration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current techniques for forming Schottky diodes in RF circuits using group III-nitride semiconductor transistors are limited, particularly for co-integration with non-planar devices, and there is a need for methods that allow for the formation of diodes in close proximity to transistors for improved RF applications.
Innovation Solution
The method involves forming Schottky diodes on semipolar planes of group III-N material structures using lateral epitaxial overgrowth (LEO) processing, which includes forming shallow trench isolation layers, patterning openings, and growing III-N material to create triangular or trapezoidal prism-like structures, allowing for the formation of Schottky diodes on sidewalls rather than planar surfaces, and integrating them with III-N transistors on the same substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If Schottky diodes are formed on planar surfaces of group III-N semiconductor structures, then the fabrication process is simpler and more straightforward, but the diodes cannot be integrated in close proximity to non-planar transistor devices
Solution Approach 1:
The patent applies dimensionality change by forming Schottky diodes on the sidewalls (vertical surfaces) of group III-N semiconductor structures rather than on planar top surfaces. This enables three-dimensional integration where diodes can be positioned adjacent to transistor devices in the vertical dimension, achieving close proximity integration while maintaining compatibility with non-planar device geometries. The sidewall formation process utilizes lateral epitaxial overgrowth to create vertically oriented semiconductor structures suitable for Schottky diode fabrication.
2Speed
If conventional fabrication methods are used for Schottky diodes, then the manufacturing process is well-established, but switching speeds are limited and system efficiency is reduced due to higher forward voltage requirements
Solution Approach 1:
The patent applies parameter changes by utilizing the unique electrical properties of group III-N semiconductor materials (such as GaN) formed on semipolar orientations. These material parameter changes enable Schottky diodes with lower forward voltage drops and higher switching speeds compared to conventional diodes. The specific crystal orientation and material composition are optimized to achieve superior electrical performance including reduced turn-on voltage and enhanced carrier mobility, directly addressing the speed and energy loss contradiction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of Schottky diodes in close proximity to III-N transistors, enhancing RF circuit performance by allowing for higher switching speeds and better system efficiency due to reduced forward voltage requirements and improved integration with existing transistor technology.
Implementation Method 1
lateral epitaxial overgrowth (LEO) processing, which includes forming shallow trench isolation layers, patterning openings, and growing III-N material
Data Source
AI summary
Techniques are disclosed for forming Schottky diodes on semipolar planes of group III-nitride (III-N) material structures. A lateral epitaxial overgrowth (LEO) scheme may be used to form the group III-N material structures upon which Schottky diodes can then be formed. The LEO scheme for forming III-N structures may include forming shallow trench isolation (STI) material on a semiconductor substrate, patterning openings in the STI, and growing the III-N material on the semiconductor substrate to form structures that extend through and above the STI openings, for example. A III-N structure may be formed using only a single STI opening, where such a III-N structure may have a triangular prism-like shape above the top plane of the STI layer. Further processing can include forming the gate (e.g., Schottky gate) and tied together source/drain regions on semipolar planes (or sidewalls) of the III-N structure to form a two terminal Schottky diode.