Schottky Gate Barrier Stack for Nitride Semiconductor Reliability
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Solution Overview
Problem
Existing semiconductor devices with TaN and TiN layers face challenges in preventing metal atom diffusion during high-temperature processing, leading to decreased Schottky barrier height and increased on-resistance due to current collapse, as the layer thickness definitions for these layers are unclear.
Innovation Solution
A semiconductor device configuration with a TaN layer as the first barrier, a TiN or WN layer as the second barrier, and an Al wiring layer, where the total thickness of the barriers and wiring layer is between 50 nm and 200 nm, specifically designed to inhibit metal atom diffusion and enhance reliability and reduce on-resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal atoms are used for the gate electrode to form a Schottky junction with AlGaN, then the device can achieve high electron saturation velocity and high insulation resistance, but metal atom diffusion during high-temperature processing decreases the Schottky barrier height and increases on-resistance
Solution Approach 1:
The patent introduces a diffusion barrier layer (TaN or TiN) as an intermediary between the metal gate electrode and the AlGaN layer. This barrier layer prevents metal atom diffusion into the semiconductor during high-temperature processing while maintaining the Schottky junction's electrical characteristics, thus stabilizing the Schottky barrier height and reducing on-resistance
Solution Approach 2:
The gate electrode structure uses a composite configuration combining multiple materials: a metal layer (Al, Cu, or Ag) for forming the Schottky junction with high electron saturation velocity, and a diffusion barrier layer (TaN or TiN) for preventing metal atom diffusion. This composite structure achieves both high electrical performance and thermal stability
2Reliability
If the gate electrode material has high work function to reduce reverse leakage current, then electrode deterioration is reduced during high temperature operation, but the Schottky barrier height may be compromised due to metal diffusion
Solution Approach 1:
The diffusion barrier layer acts as a mediator that allows the use of high work function metals (Al, Cu, Ag) for the gate electrode without compromising Schottky barrier height. The barrier layer prevents metal diffusion during high-temperature processing, thus maintaining both electrode deterioration resistance and Schottky barrier height control
3Reliability
If current collapse is suppressed by preventing electron trapping, then on-resistance remains low during high-voltage stress, but this requires precise control of the Schottky barrier which is difficult without a diffusion barrier
Solution Approach 1:
The diffusion barrier layer serves as a simple yet effective intermediary that prevents metal atom diffusion, thereby maintaining the Schottky barrier height and suppressing current collapse. This single additional layer provides the necessary control without significantly increasing device complexity
Solution Approach 2:
The patent specifies optimal thickness ranges for the diffusion barrier layer (5-20 nm for TaN, 10-30 nm for TiN) to achieve the right balance between preventing metal diffusion and maintaining electrical performance. This parameter optimization suppresses current collapse while keeping the structure simple
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed configuration effectively reduces current collapse and reverse leakage current, resulting in a semiconductor device with high reliability and low on-resistance by controlling metal atom diffusion and maintaining a stable Schottky barrier.
Implementation Method 1
a first barrier layer including TaN and having a layer thickness of Z1, the first barrier layer being a layer that forms a Schottky junction with the second nitride semiconductor layer
Implementation Method 2
the gate electrode includes: a first barrier layer including TaN and having a layer thickness of Z1, the first barrier layer being a layer that forms a Schottky junction with the second nitride semiconductor layer; a second barrier layer disposed above and in contact with the first barrier layer, the second barrier layer including TiN or WN and having a layer thickness of Z2
Data Source
AI summary
A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer; a source electrode and a drain electrode; and a gate electrode that is spaced apart from the source electrode and the drain electrode, and is in contact with the second nitride semiconductor layer. The gate electrode includes: a first barrier layer that includes TaN, has a layer thickness of Z1, and forms a Schottky junction with the second nitride semiconductor layer; a second barrier layer that is disposed above and in contact with the first barrier layer, includes TiN or WN, and has a layer thickness of Z2; and a wiring layer disposed above and in contact with the second barrier layer. In the semiconductor device, 200 nm≥Z1+Z2≥50 nm, Z1<Z2, and 50 nm>Z1>3 nm are satisfied.