Schottky Gated Transistor Interfacial Layer Leakage
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Solution Overview
Problem
High gate leakage current in Schottky gate gallium nitride (GaN) transistors leads to lower operational efficiency due to excessive power dissipation, exacerbated by poor interface properties of dielectrics and thick insulating gate layers, which result in threshold voltage instability and mobility degradation.
Innovation Solution
A Schottky gated transistor with an ultra-thin interfacial layer, typically between 5 and 40 Angstroms thick, made of non-native materials like aluminum oxide or silicon oxynitrides, is used to reduce gate leakage current while maintaining forward conduction characteristics, preventing persistent charge trapping and hysteresis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If a thick insulating gate layer is used to support high electric fields in high-voltage GaN transistors, then the device can operate at high voltages (600V-1200V), but the threshold voltage becomes unstable and mobility degrades due to charge trapping
Solution Approach 1:
The patent changes the thickness parameter of the interfacial layer from conventional thick (100-500 Å) to ultra-thin (5-40 Å). This parameter change allows the layer to support high electric fields while reducing charge trapping effects that cause threshold voltage instability, thus resolving the contradiction between high voltage capability and threshold voltage stability
Solution Approach 2:
The patent uses composite material structure consisting of ultra-thin interfacial layer (Al2O3, AlN, or SiOxNy) combined with metal gate contact. This composite structure provides both the electrical field support needed for high voltage operation and the interface quality needed to minimize charge trapping and maintain threshold voltage stability
2Device complexity
If a traditional Schottky gate contact is used on GaN, then the device structure is simple and forward conduction is good, but gate leakage current is excessively high (10 μA to 1 mA per mm)
Solution Approach 1:
The patent introduces an interfacial layer between the Schottky gate contact and GaN surface, changing the interface structure parameter. This addition reduces gate leakage current by several orders of magnitude (from 10 μA-1 mA per mm to much lower levels) while maintaining the overall simplicity of the Schottky gate structure and forward conduction characteristics
Solution Approach 2:
The ultra-thin interfacial layer acts as an intermediary between the metal gate contact and the GaN semiconductor surface. This intermediate layer provides a controlled interface that reduces leakage current while maintaining electrical contact functionality, thus resolving the contradiction between structural simplicity and energy loss
3Loss of energy
If dielectrics such as SiO2, SiN, HfO2, Al2O3, or AlN are used to create an insulated gate on GaN, then gate leakage current is reduced, but interface properties are poor causing hysteresis, time-dependent breakdown, and threshold voltage instability
Solution Approach 1:
The patent changes the thickness parameter of the dielectric layer from conventional (100-500 Å) to ultra-thin (5-40 Å). This dramatic thinning reduces the impact of interface defects and charge trapping while maintaining adequate insulation, thus improving reliability metrics such as hysteresis, time-dependent breakdown, and threshold voltage stability
Solution Approach 2:
The patent applies a specific ultra-thin dielectric layer (5-40 Å) with optimized local properties at the critical gate-interface region. This localized quality improvement addresses the poor interface properties by creating a controlled, thin interface that minimizes defect effects while maintaining the insulating function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The interfacial layer significantly reduces gate leakage current by several orders of magnitude, enhancing switching performance and preventing charge trapping, while maintaining similar forward conduction characteristics to traditional Schottky transistors.
Implementation Method 1
A Schottky gated transistor with an ultra-thin interfacial layer, typically between 5 and 40 Angstroms thick, made of non-native materials like aluminum oxide or silicon oxynitrides, is used to reduce gate leakage current while maintaining forward conduction characteristics
Data Source
AI summary
A Schottky gated transistor having reduced gate leakage current is disclosed. The Schottky gated transistor includes a substrate and a plurality of epitaxial layers disposed on the substrate. Further included is a gate contact having an interfacial layer disposed on a surface of the plurality of epitaxial layers and having a thickness that is between about 5 Angstroms (Å) and 40 Å. The interfacial layer can be made up of non-native materials in contrast to a native insulator such as silicon dioxide (SiO2) that is used as an insulating gate layer with silicon-based power transistors. The Schottky gated transistor further includes at least one metal layer disposed over the interfacial layer. A source contact and a drain contact are disposed on the surface of the plurality of epitaxial layers, wherein the source contact and the drain contact are spaced apart from the gate contact and each other.