Schottky Isolated NMOS Guard Ring for Latch-Up Prevention

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Solution Overview

Problem

Integrated circuits face latch-up conditions due to undesirable crosstalk between devices, which can lead to uncontrolled current draw and potential permanent damage, particularly in CMOS-based circuits where parasitic NPN transistors can be activated unintentionally.

Innovation Solution

Incorporating a Schottky junction in the guard ring structure around semiconductor devices to prevent latch-up by generating a Schottky diode that switches into forward or reverse mode depending on the supply voltage, reducing parasitic NPN safe operating area failures and terminating PNPN paths, thereby isolating devices effectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional guard rings are used to prevent latch-up, then device isolation is improved, but power consumption increases

Engineering Contradiction:
Improvelatch-up preventionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the electrical parameters of the guard ring by incorporating Schottky junctions, which have different voltage-current characteristics compared to conventional PN junctions. This allows the guard ring to operate with lower power consumption while maintaining latch-up prevention functionality.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The guard ring structure combines different materials forming Schottky junctions (metal-semiconductor interfaces) with the semiconductor substrate, creating a composite structure that achieves both isolation and reduced power consumption through the unique properties of Schottky barriers.

Inventive Principle:
Principle #40Composite materials

2Reliability

If guard ring size is increased to improve isolation, then latch-up prevention is improved, but device area increases

Engineering Contradiction:
Improvelatch-up preventionVSAvoiddevice area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

By changing the electrical parameters through Schottky junctions, the patent achieves effective isolation with smaller physical dimensions, as the Schottky barriers provide strong potential barriers that prevent parasitic current flow more efficiently per unit area.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention extracts and utilizes the specific properties of Schottky junctions (high barrier height, low leakage current) to achieve isolation functionality with reduced material and space, removing the need for large conventional guard ring structures.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If conventional guard rings are used, then parasitic current collection is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveparasitic current collectionVSAvoidguard ring structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the guard ring isolation function with Schottky junction formation, combining multiple functions into a single integrated structure that collects parasitic currents while maintaining simplicity in the overall device architecture.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

By utilizing standard Schottky contact formation processes already present in semiconductor manufacturing, the patent achieves improved parasitic current collection without adding significant manufacturing steps or complexity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The Schottky junction guard ring structure effectively prevents latch-up failures, reduces power consumption by 50% during normal operation, and allows for rule sizing without process changes, enhancing the safe operating area of NMOS transistors.

Implementation Method 1

Incorporating a Schottky junction in the guard ring structure around semiconductor devices to prevent latch-up by generating a Schottky diode that switches into forward or reverse mode depending on the supply voltage

Methodology Applied
Scientific EffectSchottky junction: Diode

Implementation Method 2

terminating PNPN paths, thereby isolating devices effectively

Methodology Applied
Scientific EffectSchottky barrier: Diode

Data Source

PatentUS8860168B2Schottky isolated NMOS for latch-up prevention
Publication Date: 2014.10.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8860168B2 patent drawing
  • US8860168B2 patent drawing
  • US8860168B2 patent drawing

AI summary

An integrated circuit structure includes a substrate, a semiconductor device supported by the substrate, and a guard ring structure disposed around the semiconductor device, the guard ring structure forming a Schottky junction. In an embodiment, the Schottky junction is formed from a p-type metal contact and an n-type guard ring. In an embodiment, the guard ring structure is electrically coupled to a positive or negative supply voltage.