SCI Handler Offloads Error Logging to Reduce SMM Downtime

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Solution Overview

Problem

The existing system management mode (SMM) in computer systems requires all processing cores to enter a frozen state for error detection and logging, leading to significant downtime and decreased system performance due to the suspension of all cores during the SMM execution.

Innovation Solution

Offloading the high-latency SMM service routine for error logging to the system control interrupt (SCI) handler, allowing error detection and logging to occur without entering the SMM, thereby enabling processor cores to remain operational and reducing downtime by utilizing the SCI handler for RAS services.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the system enters system management mode (SMM) for error detection and logging, then error reporting functionality is improved, but all processing cores must be frozen leading to increased downtime and decreased system performance

Engineering Contradiction:
Improveerror reportingVSAvoiddowntime
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the error handling process into two distinct parts: error detection which can occur in SMM, and error logging which is offloaded to the SCI handler. This segmentation allows the system to maintain error reporting capabilities while avoiding the performance penalty of freezing all cores during the entire error handling process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent extracts the error logging function from the SMM execution path and places it in the SCI handler. By taking out the high-latency logging operation from the critical SMM path, the system can exit SMM quickly while still completing error logging asynchronously, thus reducing downtime without losing error reporting functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If the bootstrap processor executes the complete SMM service routine for error logging, then comprehensive error reporting is achieved, but all other processor cores are suspended resulting in decreased productivity

Engineering Contradiction:
Improveerror reportingVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces the SCI handler as an intermediary component that takes over the error logging function from the bootstrap processor's SMM routine. This mediator allows error logging to proceed without requiring the bootstrap processor to maintain control, thereby enabling other cores to remain operational and improving overall system productivity during error handling.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If the system uses traditional SMM for RAS services, then system-wide error management is improved, but the high-latency SMM execution causes increased downtime

Engineering Contradiction:
ImproveRAS servicesVSAvoiddowntime
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by having the SMM routine detect errors and then immediately trigger an SCI to handle logging. This preliminary detection phase allows the system to identify errors quickly without committing to a long SMM execution, thereby reducing downtime while maintaining comprehensive RAS service functionality.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent ensures continuity of useful action by allowing the SCI handler to complete error logging after the SMM exits. This continuous processing approach maintains the usefulness of error logging while eliminating the interruption to normal system operation that would occur if all cores remained frozen during logging.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11366710B1Methods and systems for reducing downtime from system management mode in a computer system
Publication Date: 2022.06.21 QUANTA COMPUTER INC
  • US11366710B1 patent drawing
  • US11366710B1 patent drawing
  • US11366710B1 patent drawing

AI summary

A system and method for shortening the system management mode when a fault occurs in hardware component in a computer system is disclosed. The computer system has hardware components that may have faults. Notification of an error in one of the hardware components is received through RAS silicon on a processing unit. The error is detected from the hardware component by a system management interrupt handler executed by a bootstrap processor core. The error data is logged into a system error log via a system control interrupt handler executed by the processing unit. The system management mode is avoided during the logging of the error data. This prevents other processor cores being suspended from the system management mode.