SCL Decoder Path Sorting With Selective Metric Updates

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Solution Overview

Problem

Current Successive Cancellation List (SCL) decoders face inefficiencies due to high latency and processing overhead from data exchange between processor stages, particularly in managing path metrics and sorting operations, which hinder their performance in decoding large block sizes effectively.

Innovation Solution

The proposed solution involves selective replacement and deferred update techniques, where only changed path metrics are updated, and in-place calculations are performed, reducing the need for extensive data copying and sorting, thereby minimizing latency and improving buffer management efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional SCL decoder updates entire rows in buffer based on path metrics, then path metric accuracy is maintained, but processing overhead and latency increase significantly

Engineering Contradiction:
Improvepath metric accuracyVSAvoidprocessing latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent extracts and updates only the changed portions of path metrics rather than entire rows. Specifically, when a bit estimate changes, only the path metrics dependent on that bit are updated, removing unnecessary updates of unchanged metrics and reducing processing overhead while maintaining accuracy of changed metrics

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent segments the path metric update process into independent per-bit operations. Each bit estimate update triggers only the necessary downstream path metric updates, allowing parallel processing of independent bit positions and reducing overall processing latency while maintaining complete path metric accuracy

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If SCL decoder performs frequent data exchange between processor stages, then decoding accuracy is improved, but latency and processing bottlenecks increase

Engineering Contradiction:
Improvedecoding accuracyVSAvoiddecoding latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary in-place calculations of both ûφ=0 and ûφ=1 bit estimate updates before finalizing path metric updates. This preliminary action allows the system to prepare multiple possibilities in advance, reducing the need for frequent data exchange and stage coordination during critical decoding phases, thereby reducing latency while maintaining decoding accuracy

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent merges the input copy operation with the LLR update processing by performing in-place calculations. Instead of copying input statistics to a buffer and then processing, the system combines these operations, eliminating redundant data movement between processor stages and reducing decoding latency while preserving accuracy through complete metric updates

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If SCL decoder copies input statistics to buffer before processing, then data integrity is ensured, but processing efficiency and throughput decrease

Engineering Contradiction:
Improvedata integrityVSAvoidprocessing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements self-service through in-place updates where the buffer serves both as input storage and processing workspace. The same memory locations that hold input statistics are directly updated with new path metrics without requiring copy operations, eliminating redundant data movement while maintaining data integrity through controlled update sequences that ensure proper overwriting

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent inverts the conventional sequence of operations by updating path metrics in-place before rather than after copying data. Instead of copying input to buffer then updating, the system updates the buffer contents directly, eliminating the copy step and improving throughput while maintaining integrity through the inverted update sequence that ensures proper data state transitions

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentEP3657684B1Path sorting for list decoding for example for polar code decoding
Publication Date: 2022.08.31 COHERENT LOGIX INC
  • EP3657684B1 patent drawingFigure 1
  • EP3657684B1 patent drawingFigure 2
  • EP3657684B1 patent drawingFigure 3

AI summary

Various embodiments are described of a system and method for improved SCL decoder operation. In particular, various embodiments are described which improve the efficiency of the buffer management based on updated path metric statistics. In some embodiments, the SCL decoder may perform selective replacement to limit the extent of LLR updates per row only to the statistics that have changed since the previous update cycle. In some embodiments, the SCL decoder may perform deferred updates, which may involves in-place calculation of both ûϕ = o and ûϕ = 1 bit estimate (LLR) updates based on the row from which the updated row will be derived.