SCL Polar Decoder Early Termination Without Extra Parity Bits

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Solution Overview

Problem

Existing decoding methods for polar codes in 5G communication systems face challenges in reducing decoding latency and power consumption, as early termination of decoding is often limited to parity check bit positions, leading to high decoding complexity and lower code rates when additional parity check bits are used.

Innovation Solution

A successive cancellation list (SCL)-based decoder and decoding method that introduces extra error check bits at various data bit positions to enable early termination of decoding without increasing the code rate, utilizing an error checker and early termination determining circuit to perform error checks and determine decoding termination based on comparison results.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If early termination of decoding is implemented using parity check bits, then decoding latency and power consumption are reduced, but decoding complexity increases and code rate decreases when additional parity check bits are used

Engineering Contradiction:
Improvedecoding latencyVSAvoiddecoding complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

Data bits are selected to perform dual functions: serving as both information-carrying data bits and as error check bits for early termination verification. This multi-functionality eliminates the need for separate parity check bits, thereby reducing decoding complexity and maintaining code rate while still enabling early termination to reduce latency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent recovers the functionality of error checking by reusing existing data bits that would otherwise only carry information. By selecting certain data bits to also serve as error check bits, the system recovers the early termination capability without adding redundant check bits, thus avoiding increased decoding complexity.

Inventive Principle:
Principle #34Discarding and recovering

2Loss of time

If additional parity check bits are used to increase early termination opportunities, then decoding latency is reduced, but code rate decreases

Engineering Contradiction:
Improvedecoding latencyVSAvoidcode rate
Core Design Contradiction:
Loss of timeVSQuantity of substance

Solution Approach 1:

Data bits are selected to perform dual functions: serving as both information-carrying data bits and as error check bits for early termination verification. This multi-functionality eliminates the need for separate parity check bits, thereby reducing decoding complexity and maintaining code rate while still enabling early termination to reduce latency.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If parity check verification is performed at fixed positions, then decoding complexity is reduced, but early termination opportunities are limited

Engineering Contradiction:
Improvedecoding complexityVSAvoidearly termination opportunities
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The positions for error check verification are made dynamic rather than fixed. The decoder selectively determines which data bits serve as error check bits based on decoding progress and path reliability, allowing verification to occur at multiple flexible positions throughout the decoding process, thereby increasing early termination opportunities without significantly increasing complexity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11063606B2Successive cancellation list-based decoder and decoding method thereof
Publication Date: 2021.07.13 NATIONAL TSING HUA UNIVERSITY
  • US11063606B2 patent drawing
  • US11063606B2 patent drawing
  • US11063606B2 patent drawing

AI summary

A successive cancellation list-based decoder and a decoding method thereof are provided. In the method, an error check is performed on a set of data bits. A data unit includes the set of the data bits and at least one first check bit. Part of the set of data bits are considered as at least one second check bit. At each of the second check bits, its previous error-check result are verified, where the verified result is related to a comparison between each of the previous first check bits and a value obtained through a function calculation on corresponding data bits. The verified result at each of the second check bits determines whether to continue decoding of the set of data bits or to early terminate the decoding process. The method is able to increase the probability for early termination of the decoding process and to improve the decoding efficiency.