ScN Buffer Layer Reduces Lattice Mismatch in GaN on Silicon
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Solution Overview
Problem
High defect density in GaN layers grown on silicon substrates due to large lattice mismatch and thermal expansion coefficient differences, limiting the quality of epitaxially grown GaN layers.
Innovation Solution
A semiconductor wafer structure comprising a monocrystalline silicon substrate with a (111) surface orientation, a monocrystalline Sc2O3 layer, a monocrystalline ScN layer, and a monocrystalline AlzGa1-zN layer, where the ScN layer is grown with a (111) surface orientation to reduce lattice mismatch and defect density, and the AlzGa1-zN layer is grown with a (0001) surface orientation to achieve high crystal quality and low defect density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If GaN is grown directly on silicon substrate, then manufacturing simplicity is improved, but crystal quality deteriorates due to large lattice mismatch and thermal expansion coefficient differences
Solution Approach 1:
A monocrystalline ScN buffer layer with (111) surface orientation is introduced between the silicon substrate and the GaN layer. This intermediary layer has a lattice constant that is much closer to GaN than silicon, reducing the lattice mismatch from 17% to approximately 2.4%. The ScN layer acts as a mediator that bridges the crystal structure difference between Si and GaN, enabling high-quality GaN growth with significantly reduced defect density.
Solution Approach 2:
The patent creates a composite heterostructure consisting of multiple crystalline layers: silicon substrate, ScN buffer layer, and GaN active layer. Each layer is carefully selected and oriented to optimize the overall crystal quality. The composite structure combines the advantages of each material while mitigating their individual disadvantages, particularly the lattice mismatch issue.
2Manufacturing precision
If intermediate buffer layers are introduced to improve GaN layer quality, then crystal quality is improved, but device complexity increases
Solution Approach 1:
The ScN buffer layer serves as a single, well-defined intermediary that simultaneously addresses multiple issues: lattice mismatch, thermal expansion coefficient differences, and surface preparation for GaN growth. This single intermediary layer is more effective than the complex multi-layer structures proposed in prior art, reducing device complexity while maintaining high GaN layer quality.
3Manufacturing precision
If ScN buffer layer is used with (111) orientation, then lattice mismatch is reduced and defect density decreases, but manufacturing process complexity increases
Solution Approach 1:
The patent specifies precise parameters for the ScN buffer layer: (111) crystal orientation and specific thickness range (50-450 nm). These parameter optimizations enable the ScN layer to effectively reduce lattice mismatch and defect density. The well-defined parameters provide clear manufacturing guidelines that balance process complexity with quality improvement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces defect density and improves the crystal quality of the GaN layer by minimizing lattice-induced strain and allowing for controlled polarity and thermal budget in the heterostructure, resulting in a high-quality GaN layer with reduced dislocation density.
Implementation Method 1
a) providing the substrate wafer, b) epitaxially depositing a monocrystalline Sc2O3 layer on at least one surface of the substrate wafer
Implementation Method 2
c) producing a monocrystalline ScN layer on the Sc2O3 layer
Implementation Method 3
f) epitaxially depositing a monocrystalline AlzGa1-zN layer on the ScN layer
Data Source
AI summary
A semiconductor wafer contains the following layers in the given order:a monocrystalline substrate wafer (1) consisting predominantly of silicon and having a (111) surface orientation,a monocrystalline layer (3) of Sc2O3 having a (111) surface orientation,a monocrystalline layer (4) of ScN having a (111) surface orientation, anda monocrystalline layer (6) of AlzGa1-zN with 0≦z≦1 having a (0001) surface orientation,the semiconductor wafers are produced by appropriate deposition of the respective layers.