Silicon-Controlled Rectifiers With Deep Trench Isolation
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Solution Overview
Problem
Existing silicon-controlled rectifier (SCR) devices in integrated circuits are inadequate in handling electrostatic discharge (ESD) events, as they lack improved fabrication methods and device structures to effectively manage and divert ESD currents without compromising device compactness and capacitance.
Innovation Solution
A device structure for a silicon-controlled rectifier is developed, featuring a substrate with strategically arranged conductivity type wells and deep trench isolation regions, which allows for efficient ESD current diversion by forming a bi-directional SCR with reduced capacitance and increased compactness, utilizing ion implantation and dielectric material deposition techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional SCR structures are used, then device simplicity is maintained, but ESD current handling capability is insufficient
Solution Approach 1:
The SCR device is segmented into multiple functional regions including a first conductivity type well, second and third conductivity type wells, deep trench isolation regions, and doped regions. This segmentation allows each region to perform specific functions in ESD current handling, improving overall reliability while managing complexity through functional specialization.
Solution Approach 2:
The patent introduces a vertical well structure extending from the substrate surface into the bulk material, adding a depth dimension to the conventional planar SCR structure. This vertical dimension enables better ESD current diversion paths and isolation, enhancing protection capability without significantly increasing lateral device footprint.
2Area of moving object
If device compactness is increased, then area is reduced, but capacitance increases
Solution Approach 1:
By transitioning from a planar to a vertical well structure, the patent achieves compact lateral footprint while maintaining low capacitance through the depth dimension. The vertical extension into the substrate allows sufficient separation between conductive regions without requiring large lateral spacing.
Solution Approach 2:
Deep trench isolation regions filled with dielectric material serve as intermediary structures between conductive wells. These isolation regions provide electrical separation and reduce parasitic capacitance between adjacent wells, enabling compact device layout without capacitance penalty.
3Reliability
If deep trench isolation regions are added, then lateral isolation is improved, but manufacturing complexity increases
Solution Approach 1:
The isolation structure is segmented into deep trench regions that are selectively formed between specific wells. This targeted segmentation provides necessary lateral isolation where required while avoiding unnecessary fabrication steps in other areas, balancing isolation performance with manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure effectively diverts ESD currents to ground, reducing damage to sensitive integrated circuit components while maintaining a compact and low-capacitance design, enhancing the SCR's ability to handle ESD events.
Implementation Method 1
A deep trench isolation region is laterally arranged between the first well of the second conductivity type and the second well of the second conductivity type
Implementation Method 2
The SCR is a four-layer solid state device includes three electrodes or terminals, namely an anode, a cathode, and a gate, that are distributed among the four layers
Data Source
AI summary
Silicon-controlled rectifiers and methods for forming a silicon-controlled rectifier. A first well of a first conductivity type is arranged in a substrate, and second and third wells of a second conductivity type are arranged in the substrate between the first well and the top surface of the substrate. A deep trench isolation region is laterally arranged between the first well of the second conductivity type and the second well of the second conductivity type. The second well is adjoined with the first well along a first interface, the third well is adjoined with the first well along a second interface, and the deep trench isolation region extends the top surface of the substrate past the first interface and the second interface and into the first well. A doped region of the first conductivity type is arranged in the substrate between the second well and the top surface of the substrate.