SCR ESD Protection Layout for Smaller IC Footprint
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Solution Overview
Problem
Existing electrostatic discharge protection designs for semiconductor integrated circuits, particularly those using stacked low-voltage transistor devices, face challenges of large size and increased manufacturing costs due to the need for a large layout area.
Innovation Solution
The proposed electrostatic discharge protection apparatus employs a substrate with strategically positioned wells and doping regions forming a silicon controlled rectifier (SCR) structure, which directs electrostatic discharge current away from internal circuits, thereby reducing the layout area required and enhancing protection capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If stacked low-voltage transistor devices are used to achieve high-voltage ESD protection, then ESD protection ability is improved, but layout area increases
Solution Approach 1:
The patent changes the voltage parameter handling by using a single low-voltage transistor device in conjunction with a SCR structure to achieve high-voltage ESD protection, eliminating the need for stacked transistor configurations. This parameter change approach resolves the contradiction by maintaining ESD protection ability while reducing layout area.
Solution Approach 2:
The patent merges the ESD protection function with a SCR (silicon controlled rectifier) structure, combining multiple functions into a single integrated design. This merging eliminates the need for separate stacked transistor devices, thereby reducing layout area while maintaining ESD protection capability.
2Reliability
If stacked low-voltage transistor devices are used to achieve high-voltage ESD protection, then ESD protection ability is improved, but manufacturing cost increases
Solution Approach 1:
By changing from a stacked transistor configuration to a single transistor with SCR structure, the patent reduces manufacturing complexity and cost while maintaining ESD protection ability. This parameter change eliminates the need for multiple transistor stacking processes.
Solution Approach 2:
The patent extracts the high-voltage handling function from the transistor stack and relocates it to the SCR structure, allowing the use of simpler, lower-cost low-voltage transistor fabrication processes while maintaining high-voltage ESD protection capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively directs electrostatic discharge current away from internal circuits, improving the reliability and area efficiency of integrated circuits while reducing manufacturing costs by minimizing the layout area needed for ESD protection.
Implementation Method 1
Electrostatic discharge (ESD) is a phenomenon of electrostatic charge transfer between two objects at different electric potentials. The ESD can generate a large current in a short period of time
Implementation Method 2
The second well, the first well, the substrate and the fourth doping region form a silicon controlled rectifier (SCR). Electrostatic discharge current flowing into the first doping region flows to the fourth doping region through the SCR
Data Source
AI summary
The electrostatic discharge protection apparatus includes a substrate, a first well having a first conductivity type and disposed in the substrate, a second well having a second conductivity type and disposed in the first well, a first doping region having the first conductivity type and disposed in the second well, a second doping region having the first conductivity type and disposed in the second well, a third doping region having the second conductivity type and disposed in the second well, and a fourth doping region having the first conductivity type and disposed in the substrate. The first conductivity type is different from the second conductivity type. The second well, the first well, the substrate and the fourth doping region form a silicon controlled rectifier. Electrostatic discharge current flowing into the first doping region flows to the fourth doping region through the silicon controlled rectifier.


