SCR Supply Clamp With Embedded FET Trigger for Latch-Up Prevention

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Solution Overview

Problem

Conventional silicon controlled rectifiers (SCRs) used in integrated circuits for overvoltage and electrostatic discharge protection can accidentally enter a latch-up mode due to holding voltage being less than the supply voltage, posing a risk of unintended activation.

Innovation Solution

Incorporating an embedded field effect transistor (FET) or variable substrate resistor with an insulated gate as a control gate terminal in the SCR, allowing for precise control of triggering and preventing latch-up by using trigger signals to manage voltage conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the holding voltage of the SCR is reduced to enable easier turn-off, then the SCR can be turned off more readily, but the SCR may accidentally enter latch-up mode when the holding voltage is less than the supply voltage

Engineering Contradiction:
Improveease of turn-offVSAvoidaccidental latch-up prevention
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

A control gate terminal is introduced as an intermediary element between the voltage difference and the regenerative feedback mechanism. By applying a trigger signal to the control gate, the SCR can be precisely controlled to turn on only when needed, preventing accidental latch-up while maintaining ease of operation. The control gate acts as a mediator that regulates the activation condition independently of the holding voltage level.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the SCR is designed to conduct high current through regenerative feedback, then the SCR provides effective ESD protection, but the SCR becomes difficult to control and may activate unintentionally

Engineering Contradiction:
ImproveESD protection effectivenessVSAvoidcontrol precision
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

A trigger signal is applied to the control gate terminal in advance to prepare the SCR for controlled activation. This preliminary action ensures that the SCR only enters the high-current conduction state when intentionally triggered, providing precise control over when the ESD protection mechanism activates, thereby preventing unintentional activation while maintaining protection effectiveness.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents accidental latch-up of the SCR, ensuring reliable operation by allowing for controlled activation and deactivation based on voltage thresholds, thereby enhancing the protection of integrated circuits against overvoltages and electrostatic discharges.

Implementation Method 1

Incorporating an embedded field effect transistor (FET) or variable substrate resistor with an insulated gate as a control gate terminal in the SCR, allowing for precise control of triggering and preventing latch-up by using trigger signals to manage voltage conditions.

Methodology Applied
Scientific EffectField effect transistor (FET) insulation effect: Dielectric

Implementation Method 2

The SCR 11 is a switching circuit configured to conduct high current. As known to those skilled in the art, the switching mechanism of the SCR 11 occurs as a result of regenerative feedback by the bipolar transistors 13 and 15 that are connected in a back-to-back configuration.

Methodology Applied
Scientific EffectRegenerative feedback: Feedback

Data Source

PatentUS10944257B2Integrated silicon controlled rectifier (SCR) and a low leakage SCR supply clamp for electrostatic discharge (ESP) protection
Publication Date: 2021.03.09 STMICROELECTRONICS FRANCE
  • US10944257B2 patent drawing
  • US10944257B2 patent drawing
  • US10944257B2 patent drawing

AI summary

Electrostatic discharge (ESD) protection is provided in using a supply clamp circuit using an ESD event actuated SCR device. The SCR device may include an embedded field effect transistor (FET) having an insulated gate that receives a trigger signal from an ESD detection circuit. The SCR device may alternatively include a variable substrate resistor having an insulated gate that receives a trigger signal from an ESD detection circuit.