Semiconductor Screening Layer Segmentation for Implant Uniformity
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Solution Overview
Problem
The semiconductor industry faces challenges in achieving across chip implant uniformity due to non-uniform thickness of screening layers, leading to inconsistent dopant distribution and transistor performance.
Innovation Solution
A method is developed to form a stack of layers on a semiconductor substrate, including an initial layer, a buffer layer, and an offset layer, where the dry etch and wet clean processes are tailored to expose and preserve the initial layer, allowing for precise control of the buffer layer removal and maintaining the initial layer's uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional single-layer screening is used, then the process is simple, but across chip implant uniformity cannot be achieved
Solution Approach 1:
The patent segments the screening layer into an initial layer and a buffer layer, allowing the buffer layer to be selectively removed while maintaining the initial layer. This segmentation enables precise control over dopant distribution and achieves across-chip implant uniformity while adding only one additional formation step.
Solution Approach 2:
The patent changes the structural parameter of the screening layer from a single layer to a multi-layer structure with different etch selectivities. This parameter change enables selective removal of specific layers through dry etching, providing precise control over dopant distribution while maintaining process simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures consistent dopant distribution and improved transistor performance by maintaining the initial layer's uniformity, preventing dopant loss and variation across the chip.
Implementation Method 1
removing horizontal segments of the offset layer and the buffer layer using a dry etch
Implementation Method 2
a wet clean for a second period of time to substantially remove the horizontal segments of the deposited oxide layer
Data Source
AI summary
The present invention provides a method for manufacturing a semiconductor device, which includes forming a gate structure over a substrate, and forming a stack of layers on the substrate and at least partially along a sidewall of the gate structure. In this embodiment, the stack of layers includes an initial layer located over the substrate, a buffer layer located over the initial layer and an offset layer located over the buffer layer. This embodiment of the method further includes removing horizontal segments of the offset layer and the buffer layer using a dry etch and a wet clean, wherein removing includes choosing at least one of an initial thickness of the buffer layer, a period of time for the dry etch or a period of time for the wet clean such that horizontal segments of the initial layer are exposed and substantially unaffected after the dry etch and wet clean.