Screw-Assembled Semiconductor Package for Ultra-Large Die Warpage

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Solution Overview

Problem

The semiconductor industry faces challenges in achieving smaller and more efficient packaging techniques for semiconductor devices with advanced functionalities and reduced footprints, particularly in integrating ultra-large dies with minimal warpage and ensuring effective adhesive performance under mechanical stress.

Innovation Solution

A method involving a carrier with a release layer, encapsulating material, redistribution layer (RDL) structure, and heat dissipating feature, along with screw assemblies to secure the package, addressing warpage and adhesive performance issues in ultra-large dies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If wafer level integration and packaging is used to reduce physical size, then device footprint is reduced, but manufacturing complexity increases

Engineering Contradiction:
Improvedevice footprintVSAvoidmanufacturing complexity
Core Design Contradiction:
Area of moving objectVSDevice complexity

Solution Approach 1:

The manufacturing process is divided into distinct stages: forming functional dies on separate substrates, singulating them, placing on carrier substrate, and packaging. This segmentation allows each step to be optimized independently while achieving the overall goal of reduced footprint through wafer-level integration.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If ultra-large dies are integrated to enhance functionality, then device capabilities are improved, but warpage increases

Engineering Contradiction:
Improvedevice functionalityVSAvoiddie warpage
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The carrier substrate is designed with specific local properties including adhesive layers at predetermined locations and recessed regions that provide mechanical support. These localized structural features counteract warpage in specific areas of the ultra-large die while maintaining overall device functionality.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The carrier substrate structure acts as a counterweight to the ultra-large die, with recessed regions and adhesive placements designed to balance and counteract the warpage forces generated by the large die area, thereby stabilizing the overall package.

Inventive Principle:
Principle #8Anti-weight (Counterweight)

3Strength

If adhesive layers are applied to secure ultra-large dies, then mechanical stability is improved, but adhesive performance under stress deteriorates

Engineering Contradiction:
Improvemechanical stabilityVSAvoidadhesive performance
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

Adhesive layers are applied at predetermined locations on the carrier substrate before the ultra-large die is placed. This preliminary placement ensures proper adhesive distribution and bonding areas are prepared in advance, improving both mechanical stability and reliability under subsequent mechanical stress.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The adhesive layer serves as an intermediary between the carrier substrate and the ultra-large die, providing a controlled bonding interface that distributes mechanical stress evenly and maintains reliable attachment under varying operational conditions.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Speed

If conductive path length is reduced to improve electrical performance, then signal propagation speed is increased, but packaging complexity increases

Engineering Contradiction:
Improvesignal propagation speedVSAvoidpackaging complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

Multiple functional dies are integrated and packaged together as a single functional device on a carrier substrate. This merging of multiple dies into one package reduces the effective conductive path length between interoperating circuits while consolidating the packaging structure to manage the increased complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12354926B2Package and method for manufacturing the same
Publication Date: 2025.07.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12354926B2 patent drawing
  • US12354926B2 patent drawing
  • US12354926B2 patent drawing

AI summary

A package includes a die having a first side and a second side opposite to each other. The package also includes an encapsulating material surrounding the die. The package further includes a redistribution layer (RDL) structure disposed over the first side of the die and the encapsulating material. The package yet includes a heat dissipating feature disposed over the second side of the die and the encapsulating material. In addition, the package includes a first screw assembly penetrating through the die, the RDL structure and the heat dissipating feature.