Scribe Lane Alignment Key Structure for Stable Semiconductor Patterning

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Solution Overview

Problem

The structural stability of regions with alignment patterns in semiconductor devices is compromised, leading to defects such as cracks, burst, dishing, and slurry stuck during manufacturing processes, which affects the yield and integration quality of semiconductor chips.

Innovation Solution

A semiconductor device design featuring a scribe lane with alternating layers of conductive and insulating materials, sub-support patterns, and alignment patterns, where sub-support patterns are formed between alignment keys to enhance structural stability and prevent material collapse, and the use of trenches and recesses to fill conductive material for alignment keys.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If alignment patterns are formed on the scribe lane region, then lithography alignment is enabled, but structural stability deteriorates leading to defects

Engineering Contradiction:
Improvelithography alignment precisionVSAvoidstructural stability of scribe lane region
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

The scribe lane region is segmented into multiple functional zones: chip guard regions for protection, alignment key regions for lithography alignment, and support pattern regions for structural stability. This segmentation allows each zone to perform its specific function without compromising the overall structural integrity of the scribe lane region.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs composite material structures in the form of stacked material layers with different mechanical properties. Hard mask layers provide structural rigidity while softer layers provide flexibility and stress distribution. This composite structure enables the scribe lane region to maintain structural stability while supporting alignment patterns.

Inventive Principle:
Principle #40Composite materials

2Adaptability or versatility

If multiple material layers are stacked to form complex structures, then device functionality is enhanced, but structural stability and resistance to defects decrease

Engineering Contradiction:
Improvedevice functionalityVSAvoidresistance to defects
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

Support patterns are formed in advance within the stack structure before subsequent processing steps. These pre-formed support patterns act as structural reinforcement that prevents defects such as cracks, burst, and dishing during later manufacturing processes. The preliminary placement of support structures ensures that the complex multi-layer stack maintains integrity throughout the fabrication process.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If alignment keys are formed by removing material layers, then alignment precision is improved, but structural integrity is compromised

Engineering Contradiction:
Improvealignment key precisionVSAvoidstructural integrity of stack structure
Core Design Contradiction:
Measurement precisionVSStrength

Solution Approach 1:

The patent applies local quality by forming support patterns specifically in the alignment key region where structural reinforcement is needed, while leaving other regions with their original material composition. This localized reinforcement provides strength exactly where material removal creates vulnerability, without adding unnecessary complexity to other parts of the structure.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250022807A1Semiconductor device and manufacturing method of the semiconductor device
Publication Date: 2025.01.16 SK HYNIX INC
  • US20250022807A1 patent drawing
  • US20250022807A1 patent drawing
  • US20250022807A1 patent drawing

AI summary

A semiconductor device may include a lower structure including a chip region and a scribe lane region surrounding the chip region, a first alignment pattern including first alignment keys extending parallel to each other along a first direction on the scribe lane region, and a support pattern including first sub-support patterns arranged along a second direction intersecting the first direction between the first alignment keys.