Scribe Lane Trench Structure for Blocking Chip-Cutting Cracks
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Solution Overview
Problem
Cracks generated in the scribe lane region during the cutting process of semiconductor substrates can spread into semiconductor chips, causing errors in the chips.
Innovation Solution
A semiconductor device is designed with a dam structure, dielectric layer, insulating interlayer, conductive pattern, and photosensitive insulation layer, featuring a trench in the scribe lane region that exposes the dam structure and includes a crack-blocking layer on its inner surfaces and a crack-blocking portion filling the trench to prevent crack propagation into chip regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a scribe lane region is used to partition semiconductor chips on a substrate, then chip singulation is enabled, but cracks may spread from the scribe lane into the chip regions during cutting
Solution Approach 1:
A crack-blocking layer is introduced as an intermediary structure between the scribe lane region and the chip regions. This layer acts as a mediator that stops crack propagation from the scribe lane while allowing the cutting process to proceed normally for chip singulation.
Solution Approach 2:
The crack-blocking layer is formed in advance before the cutting process. By preparing this protective structure beforehand, the patent prevents crack spread into chip regions during the subsequent cutting operation, ensuring chip reliability without affecting singulation efficiency.
2Reliability
If a crack-blocking layer is added to prevent crack propagation, then chip reliability is improved, but device complexity increases
Solution Approach 1:
The crack-blocking layer is implemented as a thin film structure that provides crack protection without adding significant structural complexity. This thin film approach maintains device simplicity while achieving the reliability goal of preventing crack propagation into chip regions.
Solution Approach 2:
The crack-blocking layer is selectively positioned only in the scribe lane region where cracks are most likely to propagate, rather than throughout the entire device. This localized approach provides necessary protection while minimizing the increase in overall device complexity.
3Reliability
If the crack-blocking layer is formed on the inner surface of the trench, then crack propagation is blocked, but manufacturing precision requirements increase
Solution Approach 1:
The structure is segmented into distinct regions: the trench, the crack-blocking layer, and the chip regions. This segmentation allows each component to be optimized independently, reducing the overall manufacturing precision requirements while maintaining effective crack blocking.
Solution Approach 2:
The crack-blocking layer serves as an intermediary that bridges the trench structure and the chip regions. This mediator layer provides a buffer zone that reduces the precision requirements for trench formation, as the crack-blocking layer can compensate for minor variations in trench dimensions.
Data Source
AI summary
A semiconductor device may include a semiconductor substrate, a crack-blocking layer and a crack-blocking portion. The semiconductor substrate may include a plurality of chip regions and a scribe lane region configured to surround each of the plurality of the chip regions. A trench may be defined by one or more inner surfaces of the semiconductor device to be formed in the scribe lane region. The crack-blocking layer may be on an inner surface of the trench. The crack-blocking layer may be configured to block a spreading of a crack, which is generated in the scribe lane region during a cutting of the semiconductor substrate along the scribe lane region, from spreading into any of the chip regions. The crack-blocking portion may at least partially fill the trench and may be configured to block the spreading of the crack from the scribe lane region into any of the chip regions.