Scribe Line Metal Density Gradient for Wafer Dicing Delamination

Solution Overview

Problem

Conventional scribe line structures for wafer dicing on low-k/Cu wafers fail to prevent interlayer delamination and peeling during the sawing process, which can lead to reliability issues in semiconductor devices due to the mechanical properties of copper and low-k materials.

Innovation Solution

A scribe line structure with metal structures arranged in a dielectric layer on a substrate, where the upper metal structures have a lower metal density than the lower ones, or where metal structures have a lower density on the dicing path than off the path, providing increased stiffness and stress retardation to prevent delamination and peeling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional scribe line structures with uniform metal density are used, then the manufacturing process is simple, but interlayer delamination and peeling occur during dicing

Engineering Contradiction:

Improvedicing qualityVSAvoidscribe line structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by varying the metal density in different regions of the scribe line structure. Specifically, the metal density is reduced in the upper portions of the scribe line compared to the lower portions, creating a gradient structure that prevents interlayer delamination during dicing while maintaining manufacturing feasibility.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent changes the physical parameter of metal density within the scribe line structure. By gradually reducing metal density from the bottom to the top of the scribe line, or by creating alternating high and low density regions, the structure achieves better stress distribution during dicing without requiring completely new manufacturing processes.

Inventive Principle:

Principle #35Parameter changes

2Strength

If metal density is increased to prevent cracking, then structural strength is improved, but stress concentration causes interlayer delamination during sawing

Engineering Contradiction:

Improvestructural strengthVSAvoidinterlayer delamination

Core Design Contradiction:

StrengthVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by varying the metal density in different regions of the scribe line structure. Specifically, the metal density is reduced in the upper portions of the scribe line compared to the lower portions, creating a gradient structure that prevents interlayer delamination during dicing while maintaining manufacturing feasibility.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent converts the potentially harmful effect of metal hardness into a benefit by strategically positioning higher density metal regions at the bottom of the scribe line where they provide foundational strength, while reducing density in upper regions where they would cause stress concentration and delamination during the sawing process.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Productivity

If scribe line size is reduced for miniaturization, then device integration is improved, but cracks more easily penetrate active circuits

Engineering Contradiction:

Improvedevice integrationVSAvoidcircuit reliability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The patent changes the physical parameter of metal density within the scribe line structure. By gradually reducing metal density from the bottom to the top of the scribe line, or by creating alternating high and low density regions, the structure achieves better stress distribution during dicing without requiring completely new manufacturing processes.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9190359B2Scribe line structure for wafer dicing and method of making the same

Publication Date: 2015.11.17 UNITED MICROELECTRONICS CORP

AI summary

A scribe line structure between die regions is disclosed. The scribe line structure includes a dielectric layer disposed on a substrate; and a plurality of metal structures arranged up-and-down in the dielectric layer on the substrate, the plurality of metal structures comprising metal layers and metal vias, wherein the metal vias are disposed on the dicing path and regions outside the dicing path and the metal vias on the dicing path have a lower metal density than the metal vias not on the dicing path.