Scribe Line Probing Pads for Smaller High-Speed Flip Chip Dies
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Solution Overview
Problem
The high data rate of LPDDR5 memory chips exceeds the capabilities of standard wire bonding BGA packages, leading to increased size and cost due to the large area occupied by circuit probing pads, which are not efficiently connected by copper pillars.
Innovation Solution
A scribe line structure is introduced, featuring die regions surrounded by a scribe line region with bump pads and metal wires connecting circuit probing pads, allowing for efficient electrical connection and reducing the overall size of the semiconductor chip by minimizing the area occupied by probing pads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If circuit probing pads are placed near the edge of the memory chip to improve high-speed electrical characteristics, then electrical performance is improved, but the area occupied by probing pads increases, resulting in higher cost and larger chip size
Solution Approach 1:
The patent moves circuit probing pads from the traditional die region to the scribe line region, utilizing the peripheral area that was previously unused for functional circuits. This spatial relocation allows probing pads to be positioned near chip edges for optimal electrical performance while not consuming additional die area, as the scribe line is already part of the chip periphery structure used for wafer separation.
Solution Approach 2:
The scribe line region is given dual functionality: it serves both as the separation line for wafer dicing and as the hosting area for circuit probing pads. This multi-functional use of the scribe line eliminates the need for separate dedicated probing pad areas, thereby reducing overall chip area while maintaining electrical performance requirements.
2Area of stationary object
If the area of probing pads is reduced to decrease chip size, then chip area is reduced, but electrical connectivity and signal integrity may be compromised
Solution Approach 1:
The patent introduces metal wires as intermediary connection elements that bridge the bump pads (on the die) and circuit probing pads (on the scribe line). These metal wires provide reliable electrical connectivity across the chip perimeter, ensuring signal integrity is maintained even as probing pads are relocated and resized within the scribe line region.
Data Source
AI summary
A scribe line structure is provided. The scribe line structure includes a die region, a scribe line region, one or more bump pads, one or more circuit probing pads, and one or more metal wires. The die region is disposed on a semiconductor wafer. The scribe line region surrounds the die region. The one or more bump pads are disposed on a first top surface of an edge region of the die region. The one or more circuit probing pads are disposed on a second top surface of the scribe line region. The one or more metal wires are disposed on the first top surface of the die region and the second top surface of the scribe line region, and configured to electrically connect the one or more bump pads to the one or more circuit probing pads.