Scribe Trench Layout to Stop Dicing Cracks Reaching Chip Regions
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Solution Overview
Problem
The challenge in semiconductor device manufacturing is the occurrence of cracks during the dicing process, which can lead to defective semiconductor chips due to the removal of evaluation deep trenches in the scribe region, potentially propagating to the element region and causing defects.
Innovation Solution
The method involves forming a specific pattern of evaluation deep trenches in the scribe region, including a second-trench-second portion in a bar shape extending along the direction of the scribe region, which prevents cracks from progressing to the element region by maintaining structural integrity and controlling the dicing process effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the evaluation deep trench is formed in the scribe region to check the deep trench shape, then the measurement precision is improved, but cracks occur during dicing and may propagate to the element region causing defects
Solution Approach 1:
The evaluation deep trench is segmented into two portions: a first portion formed in the scribe region that will be removed during dicing, and a second portion formed in the element region that remains. This segmentation allows the evaluation function to be maintained while preventing crack propagation to the element region, as the first portion acts as a sacrificial buffer zone.
Solution Approach 2:
The first portion of the evaluation deep trench serves as an intermediary structure between the dicing blade and the element region. It absorbs the mechanical stress and crack initiation during dicing, protecting the element region from damage while still allowing optical evaluation to be performed on the second portion.
2Productivity
If the scribe region width is narrowed to increase the number of semiconductor chips per wafer, then the productivity is improved, but the structural integrity during dicing is reduced increasing crack risk
Solution Approach 1:
The evaluation deep trench structure is locally optimized in the scribe region with specific geometric characteristics (bar shape extending in the first direction) that enhance its ability to resist crack propagation. This local structural enhancement compensates for the reduced overall scribe region width, maintaining dicing integrity while enabling higher chip density.
3Measurement precision
If the line-and-space pattern size is increased to improve optical evaluation accuracy, then the measurement precision is improved, but more material is removed during dicing increasing the risk of cracks
Solution Approach 1:
The evaluation deep trench is configured as a bar-shaped structure extending in the first direction (parallel to dicing direction) rather than perpendicular to it. This dimensional reorientation allows the trench to span across the dicing path without being completely removed, maintaining structural continuity and reducing material loss while preserving optical evaluation capability.
Data Source
AI summary
In a case where a crack occurs in a dicing step, the crack can be suppressed from proceeding toward an element region. A first scribe region and a second scribe region that both define an element region are formed in a main surface of a semiconductor wafer. In the first scribe region, an evaluation-deep-trench group including an evaluation-deep-trench-first portion and an evaluation-deep-trench-second portion is formed. The evaluation-deep-trench-first portion is formed in a first region. The evaluation-deep-trench-second portion has a width in an X-axis direction, and is formed in a bar shape extending in a Y-axis direction, in a second region located between the first region and the element region.