Switched Capacitor Voltage Regulator Mode Change Ripple Reduction
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Solution Overview
Problem
Switching Capacitor Voltage Regulators (SCVRs) experience voltage spikes during operational mode changes, which can lead to inefficiencies and reduced performance, especially when on-die capacitance is reduced, making it challenging to maintain stable output voltage and current.
Innovation Solution
A low ripple mechanism is introduced that dynamically changes the mode of the SCVR based on switching frequency and control logic, using clock signals to synchronize phase transitions and avoid spikes by generating specific clock signals for mode changes, allowing the SCVR to operate in 2:1, 3:1, or 3:2 step down modes without voltage or current spikes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If SCVR operates in different step down modes (2:1, 3:1, 3:2) to adapt to varying input and output voltage requirements, then the adaptability and versatility of the voltage regulator is improved, but voltage spikes occur during mode changes causing instability in output voltage and current
Solution Approach 1:
The patent applies preliminary action by preparing the flying capacitors for mode transition in advance. Before switching between different step-down modes (2:1, 3:1, 3:2), the control logic pre-charges or pre-discharges the flying capacitors to appropriate voltage levels, ensuring that when the mode change occurs, there are no voltage spikes or current surges. This advance preparation maintains output voltage stability while enabling versatile voltage ratio adaptation.
2Area of stationary object
If on-die capacitance is reduced to improve integration and reduce device area, then the area and complexity of the voltage regulator is reduced, but the ability to maintain stable output during mode changes deteriorates
Solution Approach 1:
The patent uses control logic and clock signal synchronization as intermediaries to manage mode changes. The control logic monitors voltage conditions and generates appropriate clock signals that coordinate the switching of flying capacitors. This intermediary control mechanism ensures stable mode transitions even with reduced on-die capacitance, maintaining reliability while achieving compact integration.
3Productivity
If frequent mode changes are implemented to support dynamic frequency and voltage scaling (DFVS), then the productivity and adaptability of the system is improved, but voltage spikes and current spikes increase reducing efficiency
Solution Approach 1:
The patent implements periodic action through synchronized clock signals that control the switching of flying capacitors during mode changes. The clock signals are timed to occur at specific periodic intervals that align with the switching cycle, ensuring that mode transitions happen in a controlled manner. This periodic synchronization enables frequent mode changes for dynamic scaling while minimizing voltage spikes and energy loss, maintaining high productivity and efficiency.
Data Source
AI summary
Methods and apparatus relating to a low ripple mechanism of mode change in switched capacitor voltage regulators are described. In an embodiment, a mode change of a Switching Capacitor Voltage Regulator (SCVR) is caused based at least in part on a comparison of an output voltage of the SCVR and a reference voltage. The output voltage is sensed based at least in part on a clock signal. Other embodiments are also disclosed and claimed.