Enhanced SD Direct Command for Meta-Channel DMA Configuration
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Solution Overview
Problem
The SDIO protocol's host/master-driven architecture limits direct memory access (DMA) allocation and communication efficiency between SD client and host devices, leading to suboptimal throughput due to lack of metadata exchange and inefficient buffer management.
Innovation Solution
An enhanced SD direct command is used to access and establish DMA metadata over the command line, enabling parallel communication of metadata with data, allowing for improved DMA configuration and increased throughput by using the meta-channel for efficient DMA setup and data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the SDIO protocol uses a host/master-driven architecture where the host controls all data transfers, then the host can maintain control over the communication link, but slave devices cannot initiate data transfers and metadata exchange is limited, reducing communication efficiency and throughput
Solution Approach 1:
The patent segments the communication protocol into two distinct channels: a traditional data channel for bulk data transfers and a new meta-channel for metadata exchange. This segmentation allows simultaneous operation of both channels, enabling slave devices to exchange DMA allocation metadata with the host independently of data transfers, thereby improving throughput without overwhelming the protocol complexity
Solution Approach 2:
The patent adds a new dimension to the SDIO communication by introducing a meta-channel that operates parallel to the existing data channel. This dimensional addition allows metadata to be transmitted alongside data transfers using separate command lines, effectively increasing communication capacity without interfering with the established host-controlled architecture
2Productivity
If slave devices are limited to raising interrupts to the host without initiating data transfers, then the host maintains full control over the SD bus, but DMA allocation efficiency is reduced due to lack of direct metadata communication between slave devices
Solution Approach 1:
The patent introduces an intermediary meta-channel that facilitates direct metadata exchange between slave devices and the host. This intermediary channel carries DMA allocation metadata independently of the traditional interrupt mechanism, enabling efficient buffer management and DMA setup without requiring slave devices to initiate full data transfers or disrupt the host-controlled architecture
Solution Approach 2:
The patent enables preliminary action by allowing DMA metadata to be exchanged and buffer allocations to be established before actual data transfers occur. The meta-channel permits slave devices to communicate buffer status and DMA descriptors to the host in advance, so that DMA engines can be configured proactively, improving allocation efficiency and reducing latency
3Loss of time
If metadata is exchanged only through traditional interrupt mechanisms, then the protocol remains simple and host-controlled, but communication latency increases and throughput is reduced due to sequential processing requirements
Solution Approach 1:
The patent achieves continuity of useful action by enabling simultaneous operation of the data channel and meta-channel. While data transfers occur on the data channel, metadata exchange continues uninterrupted on the meta-channel, eliminating the sequential processing delays inherent in traditional interrupt-based communication. This parallel operation reduces communication latency and maintains high throughput
Data Source
AI summary
A method of improving meta-channel communications over a secure digital (SD) bus between an SD host and an SD client is described. The method includes accessing, during a current data transfer over data lines of the SD bus, a first direct memory access (DMA) metadata and a second DMA metadata over a command (CMD) line of the SD bus using an enhanced SD direct command. The method also includes establishing, prior to a next data transfer over the data lines of the SD bus, a DMA configuration for the next data transfer based on the first DMA metadata and the second DMA metadata. The method further includes communicating the next data transfer over the data lines of the SD bus according to the DMA configuration.