Latency Measurement in Software-Defined Datacenters

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Solution Overview

Problem

Current technologies inadequately address latency measurement in virtualized environments of software-defined datacenters, which is crucial for troubleshooting and optimization but has not been sufficiently addressed, especially since most datacenter applications run in virtualized settings and high latency hinders user experience and can lead to business losses.

Innovation Solution

A method is provided to identify packet latency in software-defined datacenters by storing time values associated with packet processing operations and transmissions across host computers, using controllers to process these values and identify latencies, including middlebox service operations, forwarding operations, and virtual/physical network interface card operations, with optional sampling of packets and leveraging bidirectional forwarding detection packets for network path measurement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If latency measurement is performed in virtualized environments, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvelatency measurement precisionVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces time synchronization packets as intermediary elements that carry timestamp information between virtual machines and physical hosts. These packets act as mediators to transfer timing data without requiring complex modifications to the virtualization infrastructure, thereby improving measurement precision while limiting complexity increase.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces complex hardware-based timing measurement mechanisms with software-based timestamp recording and calculation. By using software timestamps at key packet processing points instead of dedicated hardware timing circuits, the system achieves precise latency measurement without proportionally increasing device complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If detailed packet processing operation timing is tracked, then measurement precision is improved, but loss of time increases

Engineering Contradiction:
Improvelatency breakdown precisionVSAvoidmeasurement overhead time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent implements timestamp recording at pre-defined key points in the packet processing path (at the virtual machine, at the virtual switch, and at the physical network interface). By establishing these measurement checkpoints in advance rather than dynamically inserting measurement code at every processing stage, the system achieves detailed latency breakdown without excessive measurement overhead.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If network latency is measured in virtualized environments, then reliability is improved, but ease of operation worsens

Engineering Contradiction:
Improvenetwork performance monitoring reliabilityVSAvoidmeasurement implementation ease
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent designs the latency measurement mechanism to work universally across different virtualization platforms and network configurations. By using standard timestamp fields that can be embedded in existing packet protocols and implementing a generic measurement framework that adapts to different virtual switch architectures, the system improves reliability through consistent measurement while maintaining ease of operation through platform independence.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11924080B2Practical overlay network latency measurement in datacenter
Publication Date: 2024.03.05 VMWARE INC
  • US11924080B2 patent drawing
  • US11924080B2 patent drawing
  • US11924080B2 patent drawing

AI summary

Some embodiments provide a method of identifying packet latency in a software defined datacenter (SDDC) that includes a network and multiple host computers executing multiple machines. At a first host computer, the method identifies and stores (i) multiple time values associated with several packet processing operations performed on a particular packet sent by a first machine executing on the first host computer, and (ii) a time value associated with packet transmission through the SDDC network from the first host computer to a second host computer that is a destination of the particular packet. The method provides the stored time values to a set of one or more controllers to process to identify multiple latencies experienced by multiple packets processed in the SDDC.