Differential Output Circuit Layout for SDRAM Power-Domain Crossing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The decoupling of power supply domains in SDRAMs leads to susceptibility to switching noise, causing variations in Vddq and Vssq that negatively affect the integrity of the differential data strobe signal, specifically the Vox specification, resulting in non-ideal cross-over voltages and potential system failures.
Innovation Solution
Defining the power supply domain boundary between output paths at staggered stages, ensuring the same logical state is present across both paths, which helps to equate the speed of signal propagation and maintain the differential signal near the ideal cross-over voltage, thereby reducing Vox deviations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If power supply domains are decoupled to isolate Vdd/Vss from Vddq/Vssq, then noise isolation between logic circuitry and output driver circuitry is improved, but the Vddq/Vssq domain becomes susceptible to switching noise causing voltage variations that degrade differential signal integrity
Solution Approach 1:
The output paths for DQS and DQS* are segmented at different stages, with the DQS path transitioning from Vdd/Vss to Vddq/Vssq at one stage and the DQS* path transitioning at a different stage. This segmentation ensures that not all output signals switch domains simultaneously, reducing the impact of switching noise on differential signal integrity.
Solution Approach 2:
Different stages of the output paths are assigned different power supply domains based on local requirements. The Vdd/Vss domain powers early stages while Vddq/Vssq powers later stages, with the transition point varying between differential paths. This local quality approach optimizes noise isolation while maintaining signal integrity for each specific path.
2Device complexity
If the power supply domain boundary is placed at the same stage in both differential output paths, then power domain management is simplified, but noise-induced voltage variations cause unequal signal propagation speeds and non-ideal cross-over voltages
Solution Approach 1:
The power domain boundary is intentionally placed asymmetrically at different stages in the DQS and DQS* output paths. This asymmetric configuration compensates for noise-induced voltage variations by ensuring that when one path experiences voltage fluctuations, the other path is at a different stage with different noise susceptibility, thereby maintaining ideal cross-over voltages and equal propagation speeds.
3Adaptability or versatility
If Vddq and Vssq are isolated from Vdd and Vss, then each power supply can be independently regulated, but switching noise on Vddq/Vssq causes voltage variations that affect the differential data strobe signal
Solution Approach 1:
The differential output paths are designed with staggered power domain transitions as a preliminary measure against switching noise. By anticipating noise issues and implementing different transition points in advance, the design prevents noise-induced voltage variations from affecting both differential signals simultaneously, thereby maintaining signal integrity despite independent power supply regulation.
Data Source
AI summary
Disclosed herein are circuitry and methods for improving differential signals that cross power domains. In an example embodiment, the power supply domain boundary along the output paths that generate the differential signal is staggered, such that the boundary occurs at an odd numbered stage in one differential output path and at an even numbered stage in the other differential output. Defining the power supply domain boundary in this manner can help ensure that the same logical state is present at the boundary in either of the differential output paths. This same logic signal should affect subsequent stages similarly from a speed perspective, and so should similarly affect the differential signals generated by each of the output paths. This means, among other things, that the differential signal as generated should tend to cross nearer to a midpoint voltage, which increases its compliance with certain integrated circuit specifications such as the Vox specification used for the differential data strobe in an SDRAM.