Split-Level SDRAM Output Drivers With Odd-Even Bus Division
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Solution Overview
Problem
Existing SDRAM output driver circuitry experiences significant switching noise due to the decoupling of power supply domains, which affects data integrity and adds complexity, as the Vddq/Vssq domain is more susceptible to noise from high-current switching operations.
Innovation Solution
Implementing a three-power-supply system with high and low common mode signaling, where odd and even transmitter stages use Vddq and Vx, and Vx and Vssq respectively, reducing the need for power supply isolation and minimizing switching noise by ensuring no more than half of the transmitter stages source or sink current from any supply at a given time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If dual power supply domains (Vddq/Vssq) are used to power output driver circuitry, then switching noise isolation is improved, but device complexity and susceptibility to noise increase
Solution Approach 1:
The data bus is divided into two separate sub-buses: an odd-numbered data sub-bus carrying signals DQ(1), DQ(3), etc., and an even-numbered data sub-bus carrying signals DQ(2), DQ(4), etc. Correspondingly, the output driver circuitry is segmented into odd transmitter stages and even transmitter stages, with each group powered by different power supply domains. This segmentation allows noise from one domain to affect only half of the data outputs at any given time, rather than all outputs.
Solution Approach 2:
Different power supply domains are assigned to different groups of transmitter stages based on their local characteristics. Odd transmitter stages are powered by Vddq/Vssq while even transmitter stages are powered by Vdd/Vss. This local quality assignment ensures that each group operates with optimized power supply characteristics suited to its specific signaling requirements, while reducing the overall impact of switching noise across the entire output driver circuitry.
2Object-affected harmful factors
If power supply domains are decoupled for noise isolation, then switching noise susceptibility is reduced, but data integrity and circuit robustness worsen
Solution Approach 1:
The segmentation of data outputs into odd and even groups, each powered by separate power supply domains, ensures that noise events in one domain do not propagate to all outputs. This segmentation maintains data integrity by isolating noise effects to only the relevant subset of outputs, making it easier to identify and correct affected signals without compromising the entire data bus.
Solution Approach 2:
The patent introduces intermediate signaling levels and voltage translation circuitry between the two power supply domains. Odd transmitter stages operating from Vddq/Vssq can interface with even transmitter stages operating from Vdd/Vss through controlled impedance interfaces and voltage level translation, ensuring that data integrity is maintained across domain boundaries while preserving the noise isolation benefits of decoupled power supplies.
3Object-affected harmful factors
If three power supply voltages (Vddq, Vx, Vssq) are used for split-level signaling, then switching noise is reduced, but manufacturing complexity increases
Solution Approach 1:
The use of three power supply voltages (Vddq, Vx, Vssq) enables split-level signaling where odd transmitter stages operate with Vddq/Vx/Vssq and even transmitter stages operate with Vx/Vss/Vdd. This segmentation creates natural noise isolation boundaries at the Vx reference level, reducing switching noise coupling between domains while maintaining manufacturability through standardized voltage level interfaces that can be implemented using conventional CMOS process techniques.
Solution Approach 2:
The patent employs parameter changes in the power supply voltage levels to achieve noise reduction. By introducing an intermediate voltage level Vx between the high and low supply rails, the transmitter stages can operate with reduced voltage swings during switching transitions. This parameter change reduces the magnitude of switching noise generated by each transmitter stage while maintaining the required signaling levels through controlled impedance interfaces and termination resistors matched to the split-level voltage domains.
Data Source
AI summary
Disclosed herein are circuitry and methods for transmitting data across a parallel bus using both high common mode and low common mode signaling. The transmitter stages are configured to work with two of three possible power supply voltages: a high Vddq voltage, a low Vssq voltage, and an intermediate Vx voltage. In one embodiment, the odd numbered transmitter stages, that drive the odd numbered outputs to the bus, use the Vddq and Vx supplies, such that the odd numbered outputs comprise high common mode signals. The even numbered transmitter stages, that drive the even numbered outputs to the bus, use the Vx and Vssq supplies, such that the even numbered outputs comprise low common mode signals.