SDRAM Selection Circuit for Multi-Width Pad Configuration

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Solution Overview

Problem

Existing semiconductor devices face challenges in configuring DRAM chips to perform data read and write operations in multiple bit units (8-bit, 16-bit, and 32-bit) without increasing chip size, as they require exclusive chip pads for different pin configurations and signal assignments, which is not feasible for DDR2 type SDRAM chips.

Innovation Solution

A semiconductor device with a SDRAM chip of the DDR2 type that includes multiple chip pads connected to a package substrate with specific circuits for producing read and write signals, and a selection circuit to dynamically switch signal paths based on the data width, allowing the chip to perform operations in 8-bit, 16-bit, and 32-bit units without additional exclusive pads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If exclusive chip pads are provided for different data width configurations (8-bit, 16-bit, 32-bit), then the chip can support multiple pin configurations, but the chip size increases

Engineering Contradiction:
Improvesupport for multiple data width configurationsVSAvoidchip size
Core Design Contradiction:
Adaptability or versatilityVSArea of moving object

Solution Approach 1:

The patent implements multi-functionality by enabling chip pads to serve different purposes based on configuration. Specifically, chip pads can be dynamically assigned to different signal functions (DQ, DQS, RDQS, etc.) depending on the data width mode (8-bit, 16-bit, or 32-bit), allowing the same physical pad to fulfill multiple roles across different operating modes without requiring separate dedicated pads for each configuration

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent applies dynamics through the selection circuit that dynamically reconfigures the function of chip pads based on the operating mode. The selection circuit responds to configuration signals to dynamically connect chip pads to different internal circuits (first circuit for 8-bit mode, second circuit for 16-bit mode), enabling the system to adapt its pad assignments in real-time according to the required data width, thereby avoiding the need for static exclusive pads for each mode

Inventive Principle:
Principle #15Dynamics

2Reliability

If separate chip pads are allocated for different signal assignments in DDR2 type SDRAM, then signal integrity is maintained, but the chip area increases making it infeasible

Engineering Contradiction:
Improvesignal integrityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent applies dynamics through the selection circuit that dynamically reconfigures the function of chip pads based on the operating mode. The selection circuit responds to configuration signals to dynamically connect chip pads to different internal circuits (first circuit for 8-bit mode, second circuit for 16-bit mode), enabling the system to adapt its pad assignments in real-time according to the required data width, thereby avoiding the need for static exclusive pads for each mode

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The selection circuit acts as an intermediary between the chip pads and the internal circuits. It mediates the connection by routing pad signals to the appropriate circuit based on the operating mode, ensuring that signal integrity is maintained through proper routing while avoiding the need for separate dedicated pads for each signal type and mode combination

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8238133B2Semiconductor device with a selection circuit selecting a specific pad
Publication Date: 2012.08.07 MICRON TECHNOLOGY INC
  • US8238133B2 patent drawing
  • US8238133B2 patent drawing
  • US8238133B2 patent drawing

AI summary

A semiconductor device includes a selection circuit for selecting a specific pad of a semiconductor memory. The semiconductor device is configured to produce a signal determined by a pin array by the selection circuit.