Seal-Region Vertical Interconnects for Stacked Die Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing integration density of semiconductor components poses challenges in connecting integrated circuit dies without relying solely on interposers, which can limit connectivity and efficiency in packaging processes.
Innovation Solution
The implementation of vertical interconnect features, such as conductive plates or vias within sealing rings, allows direct connection between integrated circuit dies stacked on top of each other, eliminating the need for interposers and enabling higher routing density and direct power transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interposers are used to connect integrated circuit dies, then connectivity between dies is provided, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent extracts and eliminates the interposer component from the package structure. By forming vertical interconnect features directly within the seal region of the integrated circuit die, the connection function previously performed by the interposer is integrated directly into the die structure, thereby reducing device complexity while maintaining connectivity.
Solution Approach 2:
The patent merges the sealing function and the interconnection function into a single integrated structure. The seal region, which traditionally only provides environmental protection, is modified to include vertical interconnect features that provide both sealing and electrical connection functions simultaneously, eliminating the need for separate interposer layers.
2Adaptability or versatility
If interposers are used for die connection, then input/output communication is enabled, but manufacturing cost and process complexity increase
Solution Approach 1:
The sealing ring and interconnect structure are merged into a single integrated component. The vertical interconnect features are formed within the seal region using the same fabrication processes as the sealing structure, combining two previously separate manufacturing steps into one, thereby reducing manufacturing cost and process complexity.
Solution Approach 2:
The seal region is given multiple functions: it provides environmental sealing protection and simultaneously provides vertical electrical interconnection. This multi-functional design eliminates the need for dedicated interposer structures, simplifying the manufacturing process and reducing costs while maintaining full input/output connectivity capability.
3Object-affected harmful factors
If traditional sealing rings are used, then environmental protection is provided, but routing density and direct power transfer are limited
Solution Approach 1:
The patent transitions from planar routing to vertical routing by forming vertical interconnect features that extend through the seal region in the depth dimension. This three-dimensional approach to interconnection within the seal region dramatically increases routing density and enables direct power transfer without requiring additional planar space.
Data Source
AI summary
Embodiments of the present disclosure provide an integrated circuit die with vertical interconnect features to enable direct connection between vertically stacked integrated circuit dies. The vertical interconnect features may be formed in a sealing ring, which allows higher routing density than interposers or redistribution layer. The direct connection between vertically stacked integrated circuit dies reduces interposer layers, redistribution process, and bumping processes in multi-die integration, thus, reducing cost of manufacturing.