Seal Ring Bonding Structure for Stacked Semiconductor Delamination

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Solution Overview

Problem

The semiconductor industry faces challenges in further reducing the physical size of semiconductor devices through stacked and bonded configurations, as existing bonding processes are not sufficiently robust to handle thermal mismatch stresses and delamination, particularly in stacked semiconductor devices with high I/O interfaces.

Innovation Solution

The implementation of a seal ring structure that extends into the bonding layers, forming a continuous, closed loop around the functional region, which enhances protection against thermal stresses and delamination by providing robust metal-to-metal bonds, using dielectric-to-dielectric and metal-to-metal bonding techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If stacked and bonded semiconductor devices are used to reduce physical size, then integration density is improved, but thermal mismatch stresses and delamination occur

Engineering Contradiction:
Improvephysical sizeVSAvoidbonding robustness
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The bonding structure is segmented into multiple functional regions: a seal ring region that forms a continuous closed loop around the functional region, and a functional region containing the circuit elements. This segmentation allows the seal ring to specifically address thermal stress and delamination issues while the functional region maintains electrical connectivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The seal ring is formed in advance during the bonding process, creating a protective barrier before thermal cycling occurs. The seal ring extends into the bonding layers and is formed to have a continuous closed loop configuration that preemptively prevents delamination and crack propagation that would otherwise occur during subsequent thermal stress events.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If high I/O interfaces are implemented in stacked devices, then functionality is improved, but susceptibility to thermal stresses and delamination increases

Engineering Contradiction:
ImproveI/O interface capabilityVSAvoidthermal stress susceptibility
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The seal ring is specifically positioned at the periphery of the bonding structure, surrounding the functional region but not interfering with the I/O interfaces in the functional region. This local quality approach provides enhanced thermal stress protection at the vulnerable bonding interfaces while maintaining full I/O functionality in the active region.

Inventive Principle:
Principle #3Local quality

3Ease of manufacture

If conventional bonding processes are used, then manufacturing simplicity is maintained, but protection against delamination and crack propagation is insufficient

Engineering Contradiction:
Improvebonding process simplicityVSAvoidbonding protection
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The seal ring formation is merged with the existing bonding process flow. The seal ring region is formed as part of the bonding structure using dielectric-to-dielectric and metal-to-metal bonding techniques, combining the protective seal ring function with the standard bonding manufacturing process without requiring completely separate manufacturing steps.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The seal ring structure effectively prevents delamination and crack propagation, ensuring reliable electrical connectivity and structural integrity in stacked semiconductor devices, particularly those with high I/O interfaces, by enhancing bonding robustness and thermal stability.

Implementation Method 1

bonding first bond pads within the functional region to second bond pads within the semiconductor wafer; and bonding the first seal ring to a first bond metal within the semiconductor wafer

Methodology Applied
Scientific EffectMetal-to-metal bonding: Diffusion Welding

Implementation Method 2

a first dielectric over a substrate of the first semiconductor device; bonding the first dielectric to a second dielectric within the semiconductor wafer

Methodology Applied
Scientific EffectDielectric insulation: Dielectric

Data Source

PatentUS20250357383A1Semiconductor devices and methods of manufacture
Publication Date: 2025.11.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250357383A1 patent drawing
  • US20250357383A1 patent drawing
  • US20250357383A1 patent drawing

AI summary

A semiconductor device and method of manufacture are provided wherein semiconductor devices are attached over a semiconductor substrate. A seal ring within the semiconductor device is extended to include a first bond metal within a bonding layer and bonded to a second bond metal over the semiconductor substrate. Such a seal ring provided a more complete protection from cracking and delamination.