Sealed Air-Gap Interconnect Structure for Lower Parasitic Capacitance

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Solution Overview

Problem

As integrated circuit transistor densities increase and feature sizes shrink, capacitive coupling between adjacent interconnects leads to higher parasitic capacitance, slowing circuit speeds and impacting device performance, with current low κ dielectric materials posing manufacturing complexity and cost challenges due to incompatible thermal coefficients, low mechanical strength, and poor thermal diffusivity.

Innovation Solution

A semiconductor structure featuring conductive lines, dielectric pillars, and sealing caps with air gaps between them, where the sealing caps are in contact with both the conductive lines and dielectric pillars, forming enclosed air gaps that utilize air as a low dielectric constant material, allowing for reduced parasitic capacitance without requiring exotic materials or complex manufacturing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If low κ dielectric materials such as HSQ, SiLK, Black Diamond, or Coral are used to reduce parasitic capacitance, then capacitive coupling between adjacent interconnects is reduced, but manufacturing complexity increases and costs rise due to incompatible thermal coefficients, low mechanical strength, and poor thermal diffusivity

Engineering Contradiction:
Improveparasitic capacitanceVSAvoidmanufacturing complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent extracts the core functional requirement (low dielectric constant) from exotic materials and implements it using conventional materials through structural design. Specifically, it uses air gaps (dielectric constant ≈1) created by removing sacrificial mandrels, combined with standard silicon oxide sealing layers, to achieve electrical isolation without requiring HSQ, SiLK, or other specialized low-κ materials that cause manufacturing complexities

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the dielectric constant parameter by introducing air gaps into the interconnect structure. By creating void spaces filled with air (dielectric constant ≈1) between adjacent conductive interconnects, the effective dielectric constant in the coupling region is reduced from typical values (3-4 for standard dielectrics) to much lower values, thereby reducing parasitic capacitance while using only conventional manufacturing processes

Inventive Principle:
Principle #35Parameter changes

2Object-affected harmful factors

If low κ dielectric materials are used to reduce parasitic capacitance, then capacitive coupling is reduced, but mechanical strength decreases due to low mechanical strength of materials like HSQ and SiLK

Engineering Contradiction:
Improvecapacitive couplingVSAvoidmechanical strength
Core Design Contradiction:
Object-affected harmful factorsVSStrength

Solution Approach 1:

The patent creates a composite structure combining air gaps (for low dielectric constant) with conventional structural materials (silicon oxide sealing layers and standard dielectric materials). The air gaps provide the low-κ function while the silicon oxide sealing layers and surrounding dielectric materials provide mechanical strength and structural integrity, eliminating the need to rely on mechanically weak materials like HSQ or SiLK

Inventive Principle:
Principle #40Composite materials

3Object-affected harmful factors

If low κ dielectric materials are used to reduce parasitic capacitance, then electrical isolation is improved, but thermal diffusivity decreases due to poor thermal diffusivity of materials like Coral and SiLK

Engineering Contradiction:
Improveelectrical isolationVSAvoidthermal diffusivity
Core Design Contradiction:
Object-affected harmful factorsVSTemperature

Solution Approach 1:

The patent applies local quality by using air gaps only in the specific regions where electrical isolation is needed (between adjacent interconnects), while the surrounding and underlying dielectric layers maintain their conventional composition and thermal properties. This localized approach provides electrical isolation where required without compromising the overall thermal management of the interconnect structure

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent creates a composite structure where air gaps (providing low dielectric constant) are combined with conventional dielectric materials that have good thermal diffusivity. The silicon oxide sealing layers and surrounding dielectric materials maintain thermal pathways, allowing heat to dissipate effectively while the air gaps provide electrical isolation, thus avoiding the poor thermal diffusivity problem of materials like Coral and SiLK

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The semiconductor structure effectively lowers dielectric constant, reducing parasitic capacitance and enhancing device performance while maintaining compatibility with conventional manufacturing processes, thus improving circuit speed and reducing costs.

Implementation Method 1

capacitive coupling between adjacent interconnects, metal lines or other elements also increases. The increased capacitive coupling in turn results in higher parasitic capacitance

Methodology Applied
Scientific EffectDielectric constant: Dielectric Permittivity

Data Source

PatentUS11798839B2Semiconductor structure having air gap dielectric
Publication Date: 2023.10.24 NAN YA TECH
  • US11798839B2 patent drawing
  • US11798839B2 patent drawing
  • US11798839B2 patent drawing

AI summary

The present disclosure provides a semiconductor structure for reducing capacitive coupling between adjacent conductive features. The semiconductor structure includes a base layer, a plurality of conductive lines, a plurality of dielectric pillars, and a sealing layer having a plurality of sealing caps. The conductive lines are disposed on the base layer. The dielectric pillars are disposed on the base layer and separated from the conductive layer. The sealing caps are disposed between the conductive lines and the dielectric pillars, wherein the sealing caps are in contact with the conductive lines and the dielectric pillars, and separated from the base layer.