Secondary NVM Buffer for Volatile Memory Data Protection
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Solution Overview
Problem
Data storage devices face data loss risks due to power interruptions while data is temporarily stored in volatile memory before being written to primary non-volatile storage, as volatile memory is susceptible to data loss from power interruptions.
Innovation Solution
Implementing a secondary non-volatile memory (NVM) that provides real-time data protection by configuring memory banks as write-through or write-behind buffers, allowing data to be written from volatile memory to both primary and secondary NVM at the same data rate, using different types of media such as MRAM for the secondary NVM to ensure persistence across power interruptions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is temporarily stored in volatile memory before being written to primary non-volatile storage, then data can be safely written to primary storage once power is supplied, but data is susceptible to loss from power interruptions while residing in volatile memory
Solution Approach 1:
The memory buffer is divided into multiple memory banks (first memory bank and second memory bank) that operate independently. Each bank can function as a write-through buffer or write-behind buffer, allowing the system to segment the data protection function across multiple components. This segmentation enables flexible configuration to handle different data rates and protection requirements without requiring a completely complex unified system.
Solution Approach 2:
The memory banks are configured to dynamically switch between write-through buffer mode and write-behind buffer mode based on operational requirements. This dynamic reconfigurability allows the system to adapt to varying data rates and protection needs, resolving the complexity issue by providing flexibility rather than requiring a fixed, overly complex architecture.
2Speed
If data is written to primary non-volatile storage at high data rates, then storage speed is improved, but data loss risk increases during power interruptions
Solution Approach 1:
The write-behind buffer mode stores data in the memory buffer before writing to primary non-volatile storage. This preliminary action ensures that even if a power interruption occurs during the write process, the data remains safely stored in the non-volatile memory buffer, preventing data loss while maintaining high write rates to the buffer.
Solution Approach 2:
The memory buffer acts as a cushioning layer between the high-speed data input and the primary non-volatile storage. By storing data in this intermediate buffer first, the system cushions against power interruptions, allowing high-speed writes to continue without directly exposing the system to data loss risks during power failures.
3Productivity
If volatile memory is used as temporary storage location, then data can be quickly processed and written to primary storage, but data is lost when power is interrupted
Solution Approach 1:
The memory buffer serves as an intermediary between the volatile memory and primary non-volatile storage. It receives data from volatile memory at high speeds, maintains it temporarily, and then transfers it to primary storage. This intermediary role allows the system to maintain high processing speeds while providing protection against data loss during power interruptions, as the buffer itself is non-volatile.
Data Source
AI summary
A data storage device is disclosed comprising a volatile memory, a primary and a secondary non-volatile memory (NVM), and control circuitry coupled to the volatile memory and the primary and secondary NVM and configured to write first data to the volatile memory, write the first data from the volatile memory to the secondary NVM before writing the first data to the primary NVM, attempt to write the first data to the primary NVM, wherein, during the attempt to write the first data to the primary NVM, after a portion of the first data has been successfully written to the primary NVM, a corresponding portion of the first data is released from the secondary NVM.