Secondary Side Synchronous Rectification Control Circuit
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional secondary side synchronous rectification control circuits in switching converters face inefficiencies due to early turn-off timing of the driving signal, leading to abnormal spike voltages and power losses, which can damage the synchronous rectification switch.
Innovation Solution
Incorporating an inverted amplifier to precisely detect the drain source voltage of the synchronous rectification transistor, generating an inverted amplification signal that is compared with a reference voltage to produce a driving signal for controlling the conduction status of the transistor, thereby reducing timing errors and preventing spike voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the turn-off timing of the driving signal is advanced to prevent late turn-off issues, then power loss and spike voltage are reduced, but the synchronous rectification switch turns off early causing efficiency degradation
Solution Approach 1:
The patent implements a feedback mechanism by detecting the drain-source voltage of the synchronous rectification switch and using this information to control the turn-off timing of the driving signal. The control circuit monitors the actual voltage state and adjusts the gate drive signal accordingly, ensuring the switch turns off at the optimal moment rather than using fixed or premature timing, thus resolving the contradiction between preventing power loss and maintaining efficiency
Solution Approach 2:
The patent changes the control parameter from fixed timing or simple voltage threshold to a dynamically adjusted timing based on detected drain-source voltage characteristics. By adapting the turn-off timing parameter according to actual operating conditions, the system avoids both early turn-off (which reduces efficiency) and late turn-off (which causes power loss and spike voltage)
2Productivity
If the turn-off timing is delayed to maintain conduction, then rectification efficiency is improved, but abnormal spike voltage and power loss occur
Solution Approach 1:
The control circuit uses feedback from the detected drain-source voltage to determine the precise turn-off moment. By continuously monitoring the voltage and responding to its actual state, the system can extend conduction to improve efficiency while simultaneously detecting the precise moment when turn-off should occur to prevent spike voltage and power loss, thus resolving the contradiction
3Device complexity
If comparator input offset voltage is not compensated, then circuit complexity is reduced, but turn-off timing accuracy deteriorates
Solution Approach 1:
The patent introduces an intermediary compensation mechanism that addresses the comparator input offset voltage issue. Rather than directly compensating for the offset, the system uses the detected drain-source voltage as an intermediary signal that inherently accounts for the offset effects, allowing accurate turn-off timing determination without adding complex compensation circuits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces errors in turn-off timing, enhancing efficiency by preventing early turn-off and late turn-off related issues, thus avoiding power losses and protecting the synchronous rectification switch.
Implementation Method 1
an inverted amplifier which has an input end for receiving a drain source voltage signal from a synchronous rectification transistor and for outputting an inverted amplification signal
Implementation Method 2
a first comparator which receives the inverted amplification signal and a first reference signal for outputting a first comparison signal
Data Source
AI summary
A secondary side synchronous rectification control circuit is disclosed. The control circuit includes an inverted amplifier, a first comparator, and a driving unit. The inverted amplifier has an input end for receiving a drain source voltage signal from a synchronous rectification transistor and outputting an inverted amplification signal. The first comparator receives the inverted amplification signal and a first reference voltage for outputting a first comparison signal. The driving unit receives the first comparison signal and generates a driving signal according to the first comparison signal, for controlling the conduction status of the synchronous rectification transistor. The drain source voltage of the synchronous rectification transistor in the present invention is inverted amplified by an inverted amplifier, and it is connected to a comparator for generating the driving signal. The errors and defects of the turn-off timing of the driving signal may be solved and eliminated.


